A Performance Optimization Method by Gate Resizing Based on Statistical Static Timing Analysis

Masanori Hashimoto; Hidetoshi Onodera

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A Performance Optimization Method by Gate Resizing Based on Statistical Static Timing Analysis

机译：基于统计静态时序分析的门调整大小性能优化方法

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This paper discusses a gate resizing method for performance enhancement based on statistical static timing analysis. The proposed method focuses on timing uncertainties caused by local random fluctuation. Our method aims to remove both over-design and under-design of a circuit, and realize high- performance and high-reliability LSI design. The effectiveness of our method is examined by 6 benchmark circuits.

机译：本文讨论了一种基于统计静态时序分析的用于性能提升的门调整大小方法。所提出的方法集中于由局部随机波动引起的时序不确定性。我们的方法旨在消除电路的过度设计和欠设计，并实现高性能和高可靠性的LSI设计。我们的方法的有效性通过6个基准电路进行了检验。

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《IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences》 |2000年第12期|p.2558-2568|共11页
作者
Masanori Hashimoto; Hidetoshi Onodera;
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正文语种 eng
中图分类无线电电子学、电信技术;
关键词
statistical static timing analysis; static timing analysis; gate resizing;

机译：统计静态时序分析;静态时序分析;门调整大小;

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1. Gate-level dual-threshold static power optimization methodology (GDSPOM) using path-based static timing analysis (STA) technique for SOC application [J] . B. Chung, J.B. Kuo Integration . 2008,第1期

机译：使用基于路径的静态时序分析（STA）技术的门级双阈值静态功率优化方法（GDSPOM）用于SOC应用
2. Timing Analysis Rounds the Corner to Statistics: Timing-signoff flows, overburdened by corner-based analysis, evolve to encompass statistical methods [J] . David Maliniak Electronic Design . 2005,第28期

机译：时序分析为统计提供了便利：基于角点的分析使时序签核流程负担过重，逐渐演变为涵盖了统计方法
3. A Modified Nested Sparse Grid Based Adaptive Stochastic Collocation Method for Statistical Static Timing Analysis [J] . Xu LUO, Fan YANG, Xuan ZENG, IEICE Transactions on fundamentals of electronics, communications & computer sciences . 2009,第12期

机译：统计静态时序分析的基于改进嵌套嵌套稀疏网格的自适应随机配置方法
4. A performance optimization method by gate sizing using statistical static timing analysis [C] . Masanori Hashimoto, Hidetoshi Onodera International symposium on Physical design . 2000

机译：使用统计静态时序分析的门调整大小的性能优化方法
5. Analysis and Methods of Modeling Variation in Statistical Static Timing Analysis (SSTA) [D] . Foreman, Eric A. 2011

机译：统计静态时序分析（SSTA）中的变化建模方法和分析
6. Optimizing timing performance of silicon photomultiplier-based scintillation detectors [O] . Jung Yeol Yeom, Ruud Vinke, Craig S Levin -1

机译：基于硅的光电倍增管的闪烁检测器的优化定时性能
7. A Performance Optimization Method by Gate Sizing Using Statistical Static Timing Analysis [O] . Masanori Hashimoto, Hidetoshi Onodera 2000

机译：基于统计静态时序分析的门限大小的性能优化方法

A Performance Optimization Method by Gate Resizing Based on Statistical Static Timing Analysis

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