Motion Estimation and Compensation Hardware Architecture for a Scene-Adaptive Algorithm on a Single-Chip MPEG-2 video Encoder

Koyo Nitta; Toshihiro Minami; Toshio Kondo

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Motion Estimation and Compensation Hardware Architecture for a Scene-Adaptive Algorithm on a Single-Chip MPEG-2 video Encoder

机译：基于单片MPEG-2视频编码器的场景自适应算法的运动估计和补偿硬件架构

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摘要

This paper describes a unique motion estima- tion and compensation (ME/MC)hardware architecture for a scene-adaptive algorithm. By statistically analyzing the charac- teristics of the scene being encoded and controlling the encoding parameters according to the scene, the quality of the decoded image can be enhanced. The most significant feature of the ar- chitecture is that the two modules for ME/MC can work inde- pendently.

机译：本文介绍了一种适用于场景自适应算法的独特运动估计和补偿（ME / MC）硬件体系结构。通过统计分析要编码的场景的特征并根据场景控制编码参数，可以提高解码图像的质量。该体系结构最重要的特点是，ME / MC的两个模块可以独立工作。

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来源
《IEICE Transactions on Information and Systems》 |2001年第3期|p.317-325|共9页
作者
Koyo Nitta; Toshihiro Minami; Toshio Kondo;
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收录信息美国《科学引文索引》(SCI);美国《工程索引》(EI);
原文格式 PDF
正文语种 eng
中图分类无线电电子学、电信技术;
关键词
motin estimation and compensation; sceneadaptive algorithm; MPEG-2 video encoder;

机译：单项估计和补偿;场景自适应算法MPEG-2视频编码器;

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专利

1. Multi-resolution block matching algorithm and its VLSI architecture for fast motion estimation in an MPEG-2 video encoder [J] . Byung Cheol Song, Kang-Wook Chun IEEE Transactions on Circuits and Systems for Video Technology . 2004,第9期

机译：MPEG-2视频编码器中用于快速运动估计的多分辨率块匹配算法及其VLSI架构
2. A Single-Chip MPEG-2 422P@ ML Video, Audio, and System Encoder with a 162MHz Media-Processor Core And Dual Motion Estimation Cores [J] . Tetsuya Matsumura, Satoshi Kumaki, Hiroshi Segawa IEICE Transactions on Electronics . 2001,第1期

机译：具有162MHz媒体处理器内核和双运动估计内核的单芯片MPEG-2 422P @ ML视频，音频和系统编码器
3. A 1.5-W single-chip MPEG-2 MP@ML video encoder with low power motion estimation and clocking [J] . Mizuno M., Ooi Y. IEEE Journal of Solid-State Circuits . 1997,第11期

机译：具有低功耗运动估计和时钟的1.5W单芯片MPEG-2 MP @ ML视频编码器
4. Motion-estimation/motion-compensation hardware architecture for a scene-adaptive algorithm on a single-chip MPEG-2 MP@ML video encoder [C] . Koyo Nitta, Toshihiro Minami, Toshio Kondo, Conference on visual communications and image processing . 1998

机译：用于单芯片MPEG-2 MM @ ML视频编码器的场景自适应算法的运动估计/运动补偿硬件架构
5. Fast motion estimation algorithms for video encoding and deinterlacing [D] . Li, Renxiang 2000

机译：用于视频编码和去隔行的快速运动估计算法
6. Depth from a Motion Algorithm and a Hardware Architecture for Smart Cameras [O] . Abiel Aguilar-González, Miguel Arias-Estrada, François Berry 2019

机译：智能相机运动算法和硬件体系结构的深度
7. Multi-resolution block matching algorithm and its vlsi architecture for fast motion estimation in an mpeg-2 video encoder [O] . Byung Cheol Song, Jong Beom Ra 2004

机译：多分辨率块匹配算法及其vlsi架构，用于mpeg-2视频编码器中的快速运动估计

Motion Estimation and Compensation Hardware Architecture for a Scene-Adaptive Algorithm on a Single-Chip MPEG-2 video Encoder

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