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首页> 外文期刊>IEEE transactions on industrial informatics >FPGA Implementation of Predictive Cascaded Speed and Current Control of PMSM Drives With Two-Time-Scale Optimization
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FPGA Implementation of Predictive Cascaded Speed and Current Control of PMSM Drives With Two-Time-Scale Optimization

机译：具有两次标度优化的PMSM驱动器预测级联速度和电流控制的FPGA实现

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摘要

This paper proposes a field programmable gate array (FPGA) implementation of predictive speed and current control of permanent magnet synchronous motor (PMSM) with two-time-scale optimization. Considering the time-scale characteristics of speed loop and current loop, different sampling times are assigned to the subsystems. The predictions of both slow and fast models consuming great computation resource for all the prediction instants are analyzed in two-time-scale system. In order to achieve a fast and accurate predictive control, the proposed method is implemented on an FPGA. Parallel unrolling and maximized parallel pipeline architecture are designed specifically to optimize the computational time of the proposed method. Experimental results validated in PMSM drives illustrate that proposed implementation achieves a high performance with balanced resource consumption.
机译：本文提出了一种永磁可编程同步电动机（PMSM）的预测速度和电流控制的现场可编程门阵列（FPGA）实施，并进行了两次标度优化。考虑到速度环和电流环的时标特性，将不同的采样时间分配给子系统。在两个时间尺度的系统中分析了慢速模型和快速模型的预测，这些模型对于所有预测瞬间都消耗大量的计算资源。为了实现快速准确的预测控制，该方法在FPGA上实现。专门设计了并行展开和最大化并行管道体系结构，以优化所提出方法的计算时间。在PMSM驱动器中验证的实验结果表明，所提出的实现在平衡资源消耗的情况下实现了高性能。

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