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首页> 外文期刊>International journal of circuit theory and applications >Design of a CMOS 65-nm inductor-less VCO for ISM applications in the VHF band
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Design of a CMOS 65-nm inductor-less VCO for ISM applications in the VHF band

机译：用于VHF频段ISM应用的CMOS 65 nm无电感器VCO设计

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摘要

This paper presents a design of a CMOS cross-coupled voltage-controlled oscillator (VCO) using active inductors (AIs) for wide-band applications and can also be applied to various wireless technologies standards. The compatibility of this design to different wireless standards highlights its potential to be implemented at the core of the communication front end in the Internet of Things (IoT). The proposed AI design employs a gyrator-C topology as the basic structure to generate an inductance. The VCO uses a cross-coupled oscillator structure with a pair of varactors to sweep the frequency. Two extra capacitors, between the AIs and the outputs of the VCO core tank, are employed to enhance the performance of the phase noise and make the VCO work similarly to a linear transconductance (LiT) oscillator. Both the AIs and the VCO are designed in the TSMC 65-nm CMOS technology, and the performance is analyzed using postsimulation results, as well as through measurements. The fundamental frequency spans from 140 to 463 MHz. Thus, the relative tuning range of this design is approximately 107%. The optimal phase noise of the design is around -97 dBc/Hz at 1-MHz offset. Furthermore, it achieves an excellent figure of merit (FOM) around -163 dBc/Hz with a direct current (DC) power consumption less than 3 mW. The proposed design shows an advantage in phase noise and power consumption in comparison with previous active inductor VCO and ring VCO designs, respectively. The final layout occupies only 0.4 x 0.62 mm(2) including the pads. The proposed AI-VCO shows a compact size, linear tuning, low power consumption, and good phase noise performance.
机译：本文介绍了一种采用宽带有源应用的有源电感器（AI）的CMOS交叉耦合压控振荡器（VCO）的设计，该设计还可应用于各种无线技术标准。该设计与不同无线标准的兼容性突出了其在物联网（IoT）的通信前端核心中实现的潜力。拟议的AI设计采用回转器C拓扑作为产生电感的基本结构。 VCO使用带有一对变容二极管的交叉耦合振荡器结构来扫描频率。在AI和VCO核心箱的输出之间使用两个额外的电容器来增强相位噪声的性能，并使VCO的工作方式类似于线性跨导（LiT）振荡器。 AI和VCO均采用台积电65纳米CMOS技术设计，并使用后仿真结果以及通过测量来分析性能。基本频率范围从140到463 MHz。因此，该设计的相对调谐范围约为107％。该设计的最佳相位噪声在1MHz偏移处约为-97 dBc / Hz。此外，在直流（DC）功耗小于3 mW的情况下，它可实现-163 dBc / Hz左右的出色品质因数（FOM）。与以前的有源电感器VCO和环形VCO设计相比，拟议的设计在相位噪声和功耗方面均具有优势。包括焊盘在内的最终布局仅占0.4 x 0.62 mm（2）。拟议的AI-VCO具有紧凑的尺寸，线性调谐，低功耗和良好的相位噪声性能。

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