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Hardware design implementation issues of the estimator-based controller using FPGA

机译:使用FPGA的基于估算器的控制器的硬件设计实现问题

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Hardware implementation issues play a vital role to realize the system accurately. Realization of hardware in digital domain has more advantages than analog domain. Field programming gate array (FPGA) based architectures are suitable for fast and reconfigurable systems. In this paper, implementation issues of an estimator based controller using FPGA are discussed. Verilog coding is developed to defeat these issues and efficient hardware mapping is derived. Input signal processing is proposed to overcome the analog to digital converter (ADC) interfacing issues such as quantization, sampling rate, resolution, non-linearity error and offset error. Optimum bit sizing of digital control modules are derived, considering system requirements and specifications. Controller operations are analyzed in binary form to choose the bit size of various operands and control modules, to derive accurate results. In this application, a 16-bit control architecture is proposed to estimate states of the converter and to generate control signals. Estimator based controller is designed for a dc-dc converter. Atlys Spartan-6 XC6SLX45 FPGA is used to implement the controller. Implementation issues such as ADC errors, settling time, the bit size of variables, quantization effects of the estimator and controller are mainly focused. It enables verilog coding quite easier to implement non-linear controllers using FPGA.
机译:硬件实施问题对于准确实现系统起着至关重要的作用。在数字领域实现硬件比在模拟领域具有更多优势。基于现场编程门阵列(FPGA)的体系结构适用于快速且可重新配置的系统。本文讨论了使用FPGA的基于估计器的控制器的实现问题。开发了Verilog编码来克服这些问题,并获得了有效的硬件映射。提出输入信号处理以克服模数转换器(ADC)接口问题,例如量化,采样率,分辨率,非线性误差和失调误差。考虑到系统要求和规格,得出了数字控制模块的最佳位大小。以二进制形式分析控制器的操作,以选择各种操作数和控制模块的位大小,以得出准确的结果。在此应用中,提出了一种16位控制架构来估计转换器的状态并生成控制信号。基于估计器的控制器是为DC-DC转换器设计的。 Atlys Spartan-6 XC6SLX45 FPGA用于实现控制器。 ADC误差,建立时间,变量的位大小,估计器和控制器的量化效果等实现问题主要集中在此。它使Verilog编码非常容易使用FPGA实现非线性控制器。

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