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首页> 外文期刊>International journal of information technology and web engineering >Efficient Low-Power Compact Hardware Units for Real-Time Image Processing
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Efficient Low-Power Compact Hardware Units for Real-Time Image Processing

机译：高效的低功耗紧凑型硬件单元，用于实时图像处理

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摘要

This paper presents efficient low-power compact hardware designs for common image processing functions including the median filter, smoothing filter, motion blurring, emboss filter, sharpening, Sobel, Roberts, and Canny edge detection. The designs were described in Verilog HDL. Xilinx ISE design suite was used for code simulation, synthesis, implementation, and chip programming. The designs were all evaluated in terms of speed, area (number of LUTs and registers), and power consumption. Post placement and routing (Post-PAR) results show that they need very small area and consume very little power while achieving good frame per second rate even for HDTV high resolution frames. This makes them suitable for real-time applications with stringent area and power budgets.
机译：本文介绍了用于常见图像处理功能的高效低功耗紧凑型硬件设计，其中包括中值滤波器，平滑滤波器，运动模糊，压纹滤波器，锐化，Sobel，Roberts和Canny边缘检测。这些设计在Verilog HDL中进行了描述。 Xilinx ISE设计套件用于代码仿真，合成，实现和芯片编程。所有设计都在速度，面积（LUT和寄存器的数量）和功耗方面进行了评估。后期置放和布线（Post-PAR）结果表明，即使对于HDTV高分辨率帧，它们也需要很小的面积并消耗很少的功率，同时又能获得良好的每秒帧率。这使它们适合具有严格面积和功耗预算的实时应用。

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