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首页> 外文期刊>Japanese journal of applied physics >Robust Data Retention and Superior Endurance of Silicon-Oxide-Nitride-Oxide-Silicon-Type Nonvolatile Memory with NH_3-Plasma-Treated and Pd-Nanocrystal-Embedded Charge Storage Layer
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Robust Data Retention and Superior Endurance of Silicon-Oxide-Nitride-Oxide-Silicon-Type Nonvolatile Memory with NH_3-Plasma-Treated and Pd-Nanocrystal-Embedded Charge Storage Layer

机译:具有NH_3-等离子处理和Pd-纳米晶体嵌入式电荷存储层的氧化硅-氮化物-氧化硅-硅类型非易失性存储器的稳健数据保留和卓越的耐久性

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摘要

In this study, we investigated an ammonia (NH_3) plasma-pretreatment (PT) for suppressing the formation of interface states between metal nanocrystals (NCs) and the surrounding dielectric during the NC forming process with the aim of obtaining a highly reliable Pd NC memory. The discharge-based multipulse (DMP) technique was performed to analyze the distribution of trap energy levels in the Pd NCs/Si_3N_4-stacked storage layer. Through DMP analysis, it is confirmed that the NH_3 PT not only significantly increases the quality of the surrounding dielectric of metal NCs but also effectively passivates shallow trap sites in the Si_3N_4 trapping layer. As compared with the sample without NH_3 PT, the NH_3-plasma-treated device exhibits better reliability characteristics such as excellent charge retention (only 5% charge loss for 10~4 s retention time) and very high endurance (no memory window narrowing after 10~5 program/erase cycles). In addition, the robust multilevel cell retention properties of the NH_3-plasma-treated memory are also demonstrated.
机译:在这项研究中,我们研究了一种氨(NH_3)等离子体预处理(PT),用于抑制NC形成过程中金属纳米晶体(NC)与周围介电层之间的界面态的形成,目的是获得高度可靠的Pd NC存储器。进行了基于放电的多脉冲(DMP)技术,以分析Pd NCs / Si_3N_4堆叠存储层中陷阱能级的分布。通过DMP分析,可以确定NH_3 PT不仅显着提高了金属NC周围电介质的质量,而且还有效地钝化了Si_3N_4陷阱层中的浅陷阱位点。与未使用NH_3 PT的样品相比,经NH_3等离子体处理的设备具有更好的可靠性,例如出色的电荷保持力(在10〜4 s的保持时间内只有5%的电荷损失)和非常高的耐久性(10秒钟后记忆窗不会变窄) 〜5个编程/擦除周期)。此外,还展示了经NH_3-等离子体处理的内存的强大的多级细胞保留特性。

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  • 来源
    《Japanese journal of applied physics》 |2012年第4issue2期|p.04DD05.1-04DD05.4|共4页
  • 作者单位

    Electrical and Communications Engineering, Feng Chia University, Taichung 407, Taiwan;

    Department of Electronic Engineering, Feng Chia University, Taichung 407, Taiwan;

    Department of Electronic Engineering, Feng Chia University, Taichung 407, Taiwan;

    Department of Electrophysics, National Chiao Tung University, Hsinchu 330, Taiwan;

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