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首页> 外文期刊>Japanese journal of applied physics >Investigation on Characteristic Variation of Polycrystalline Silicon Thin-Film Transistor Using Laterally Grown Film
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Investigation on Characteristic Variation of Polycrystalline Silicon Thin-Film Transistor Using Laterally Grown Film

机译：用横向生长膜研究多晶硅薄膜晶体管的特性变化

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摘要

The characteristic variation of thin-film transistors (TFTs) fabricated on laterally grown polycrystalline silicon (poly-Si) prepared by pulsed laser scanning was investigated. TFTs with various channel designs were fabricated and investigated: TFTs with n- and p-channels, TFTs whose channel was set either parallel or perpendicular to the grain growth direction, and TFTs whose channel is composed of a single channel or multiple stripes. It was found that the variation in current drive is not due to the variation in threshold voltage but primarily due to the variation in carrier mobility. The variation in carrier mobility was found to be larger in perpendicular-aligned TFTs than in parallel-aligned TFTs and also larger in n-channel TFTs than in p-channel TFTs. From the investigation of TFTs with multiple stripes, it was found that the characteristic variation depended on the total channel width. We also evaluated the potential barrier height at the grain boundaries from the temperature-dependent carrier mobility, which gave us a potential barrier height of 13.2 meV for the n-channel TFT and 7.18 meV for the p-channel TFT. The potential barrier height was found to decrease with increasing gate voltage. The experimental results indicate that the characteristic variation of poly-Si TFTs decreases with decreasing potential barrier at the grain boundaries. In fact, it is shown that TFTs whose potential barrier was reduced by hydrogen plasma treatment show a reduced characteristic variation.
机译：研究了通过脉冲激光扫描在横向生长的多晶硅（poly-Si）上制造的薄膜晶体管（TFT）的特性变化。制作并研究了具有各种沟道设计的TFT：具有n沟道和p沟道的TFT，其沟道设置为与晶粒生长方向平行或垂直的TFT，以及其沟道由单个沟道或多个条纹组成的TFT。发现电流驱动的变化不是由于阈值电压的变化而是主要由于载流子迁移率的变化。发现载流子迁移率的变化在垂直排列的TFT中比在平行排列的TFT中大，并且在n沟道TFT中也比在p沟道TFT中大。通过对具有多个条纹的TFT的研究，发现特性变化取决于总沟道宽度。我们还根据与温度相关的载流子迁移率评估了晶界处的势垒高度，这使我们对于n沟道TFT的势垒高度为13.2 meV，对于p沟道TFT的势垒高度为7.18 meV。发现势垒高度随着栅极电压的增加而减小。实验结果表明，随着晶界势垒的减小，多晶硅薄膜晶体管的特性变化减小。实际上，表明通过氢等离子体处理降低了势垒的TFT显示出减小的特性变化。

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  • 来源
    《Japanese journal of applied physics》 |2009年第3issue3期|69-73|共5页
  • 作者

    Koji Akiyama; Kazunori Watanabe; Tanemasa Asano;

  • 作者单位

    Department of Electronics, Graduate School of Information Science and Electrical Engineering, Kyushu University, 744 Motooka, Nishi-ku, Fukuoka 819-0395, Japan;

    Department of Electronics, Graduate School of Information Science and Electrical Engineering, Kyushu University, 744 Motooka, Nishi-ku, Fukuoka 819-0395, Japan;

    Department of Electronics, Graduate School of Information Science and Electrical Engineering, Kyushu University, 744 Motooka, Nishi-ku, Fukuoka 819-0395, Japan;

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