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首页> 外文期刊>Japanese Journal of Applied Physics. Part 1, Regular Papers, Brief Communications & Review Papers >Epitaxial Silicon Growth by Load-Lock Low Pressure Chemical Vapor Deposition System for Elevated Source/Drain Formation
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Epitaxial Silicon Growth by Load-Lock Low Pressure Chemical Vapor Deposition System for Elevated Source/Drain Formation

机译：通过负载锁定低压化学气相沉积系统外延生长硅，以提高源/漏形成

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摘要

A silicon epitaxial layer on the active region of a Si substrate was selectively grown under a low temperature condition of 620℃ with a low pressure chemical vapor deposition (LPCVD) employing SiH_4 as a precursor, without high-temperature H_2 annealing and ultra high vacuum chemical vapor deposition (UHV-CVD). This method was achieved by the use of a N_2-purged wafer cassette and a load-lock chamber that was directly connected to the CVD chamber. A cross-sectional transmission electron microscopy (TEM) micrograph of the interface between the CVD-deposited film and the Si substrate revealed that the Si film was grown homoepitaxially, however nanometer-scaled silicon oxide islands were sparsely formed at the interface. Epitaxial film growth seemed to be achieved by lateral grain growth over oxide islands during film deposition. Polycrystalline Si was grown on the silicon oxide under the same deposition condition, and a Si epitaxial growth layer was formed on the active region selectively by wet chemical etching using HNO_3, CH_3COOH and HF-based solution. Since this system has higher throughput than conventional UHV-CVD or MBE systems, it is expected to become important for the development of future ULSI devices with a sub-50nm-scale metal-oxide-semiconductor field effect transistor (MOSFET).
机译：在不进行高温H_2退火和超高真空化学处理的情况下，以SiH_4为前驱体的低压化学气相沉积（LPCVD）在620℃的低温条件下选择性生长了Si衬底有源区上的硅外延层。气相沉积（UHV-CVD）。该方法是通过使用N_2吹扫的晶圆盒和直接连接到CVD室的负载锁定室实现的。 CVD沉积膜和Si衬底之间的界面的截面透射电子显微镜（TEM）显微照片显示，Si膜是同质外延生长的，但是在界面处稀疏形成了纳米级的氧化硅岛。外延薄膜的生长似乎是通过在薄膜沉积过程中氧化物岛上的横向晶粒生长来实现的。在相同的沉积条件下在氧化硅上生长多晶Si，并使用HNO_3，CH_3COOH和HF基溶液通过湿法化学刻蚀在有源区上选择性地形成Si外延生长层。由于此系统比常规的UHV-CVD或MBE系统具有更高的吞吐量，因此，对于开发具有50nm以下金属氧化物半导体场效应晶体管（MOSFET）的ULSI器件，它有望变得至关重要。

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