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首页> 外文期刊>Japanese journal of applied physics >A 17.6-to-24.3GHz -193.3 dB figure-of-merit LC voltage-controlled oscillator using layout floorplan optimization technique for Q-factor enhancement
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A 17.6-to-24.3GHz -193.3 dB figure-of-merit LC voltage-controlled oscillator using layout floorplan optimization technique for Q-factor enhancement

机译:17.6至24.3GHz -193.3 DB型LC电压控制振荡器使用布局平面图优化技术进行Q因子增强

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摘要

This paper presents a 20 GHz low-phase-noise low-power LC voltage-controlled oscillator (VCO). It adopts a fully differential tuning varactor, a coarse and a fine capacitor array to cover wide tuning range with a small tuning gain to reduce the amplitude-to-phase noise conversion, A layout floorplan is proposed to reduce the impact of the parasitic resistance of the interconnect and thus improve the Q of the LC tank in the VCO. Hence, the phase noise can be reduced without increasing power consumption. Post-layout simulation results show that the VCO with the proposed layout floorplan can get the phase noise reduction from 1.6 to 3.3 dB compared to the VCO with other layout floorplans in the case of the same power consumption. Implemented in a 65 nm CMOS process, the prototype achieves 17.6-24.3 GHz frequency range, -124 dBc/Hz@10 MHz phase noise at 20.1 GHz carrier frequency, 4.9 mW DC power, and -193.3 dB figure-of-merit. (C) 2020 The Japan Society of Applied Physics
机译:本文介绍了20 GHz低相位噪声低功耗LC电压控制振荡器(VCO)。它采用完全差分调谐变容仪,粗糙和精细电容器阵列,覆盖宽调谐范围,具有小调谐增益,以降低幅度到相位噪声转换,提出了一种布局平面图,以减少寄生电阻的影响互连并因此改善VCO中LC罐的Q.因此,可以在不增加功耗的情况下减小相位噪声。后布局仿真结果表明,与所提出的布局平面图的VCO与VCO相比,与其他布局平面平面相比,与其他布局平面平面相比,可以获得1.6到3.3 dB的相位降噪。在65nm CMOS过程中实现,原型实现了17.6-24.3GHz频率范围,-124 dBc / Hz @ 10 MHz相位噪声,在20.1 GHz载波频率,4.9 MW DC电源和-193.3 DB型号。 (c)2020日本应用物理学会

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  • 来源
    《Japanese journal of applied physics》 |2020年第sg期|SGGL05.1-SGGL05.8|共8页
  • 作者单位

    Chinese Acad Sci Inst Semicond State Key Lab Superlattice & Microstruct Beijing 100083 Peoples R China|Univ Chinese Acad Sci Ctr Mat Sci & Optoelect Engn Beijing 100049 Peoples R China;

    Chinese Acad Sci Inst Semicond State Key Lab Superlattice & Microstruct Beijing 100083 Peoples R China|Univ Chinese Acad Sci Ctr Mat Sci & Optoelect Engn Beijing 100049 Peoples R China;

    Chinese Acad Sci Inst Semicond State Key Lab Superlattice & Microstruct Beijing 100083 Peoples R China|Univ Chinese Acad Sci Ctr Mat Sci & Optoelect Engn Beijing 100049 Peoples R China;

    Chinese Acad Sci Inst Semicond State Key Lab Superlattice & Microstruct Beijing 100083 Peoples R China|Univ Chinese Acad Sci Ctr Mat Sci & Optoelect Engn Beijing 100049 Peoples R China;

    Chinese Acad Sci Inst Semicond State Key Lab Superlattice & Microstruct Beijing 100083 Peoples R China|Univ Chinese Acad Sci Ctr Mat Sci & Optoelect Engn Beijing 100049 Peoples R China;

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