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首页> 外文期刊>Journal of circuits, systems and computers >Design of Low Power with Expanded Noise Margin Subthreshold 12T SRAM Cell for Ultra-Low Power Devices
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Design of Low Power with Expanded Noise Margin Subthreshold 12T SRAM Cell for Ultra-Low Power Devices

机译：用于超低功耗设备的扩展噪声裕度亚斯雷姆电池的低功率设计

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摘要

In the proposed work, a differential write and single-ended read half-select free 12 transistors static random access memory cell is designed and simulated. The proposed cell has a considerable reduction in power dissipation with better stability and moderate performance. This cell operates in subthreshold region and has a higher value of read static noise margin as compared to conventional six transistors static random access memory cell. A power cut-off technique is utilized between access and pull-up transistors during the write operation. It results in an increase in write static noise margin as compared to all considered cells. In the proposed cell, read and write access time is improved along with a reduction in read/write power dissipation as compared to conventional six transistors static random access memory cell. The bitline leakage current in the proposed cell is reduced which improves the I-on/I-off ratio of the cell under subthreshold region. The proposed cell occupies less area as compared to considered radiation-hardened design 12 transistors static random access memory cell. The computed electrical quality metric of proposed cell is better among considered static random access memory cells. Process variation analysis of read stability, access time, power dissipation, read current and leakage current has been performed with the help of Monte Carlo simulation at 3,000 points to get more soundness in the results. All characteristics of static random access memory cells are compared at various supply voltages.
机译：在所提出的工作中，设计和模拟了差分写入和单端读取半选择自由12个晶体管静态随机存取存储器。该拟议的电池具有相当大的功耗降低，具有更好的稳定性和中等性能。与传统的六个晶体管静态随机存取存储器相比，该单元在亚阈值区域中操作，并且具有更高的读取静态噪声裕度值。在写入操作期间访问和上拉晶体管之间使用功率截止技术。与所有考虑的单元相比，它导致写静电噪声裕度的增加。与传统的六个晶体管静态随机存取存储器相比，在所提出的单元中，读取和写入访问时间随着读/写功率耗散而改善。所提出的电池中的位线漏电流降低，从而改善了亚阈值区域下电池的I-ON / I-OFF比率。与考虑辐射硬化设计12晶体管静态随机存取存储器相比，所提出的电池占据较少的区域。在考虑静态随机存取存储器单元中，所提出的单元的计算电气质量度量更好。在Monte Carlo仿真的帮助下，在3,000点的帮助下，在蒙特卡罗模拟的帮助下进行了读取稳定性，访问时间，功耗，读取电流和漏电流的处理变化分析，以获得更高的结果。在各种电源电压下比较静态随机存取存储器单元的所有特征。

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