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A fast method for process reliability analysis of CNFET-based digital integrated circuits

机译：基于CNFET的数字集成电路的过程可靠性分析的快速方法

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摘要

Due to aggressive technology scaling in electronic of digital integrated circuits, the circuit reliability is becoming an ever-increasing challenge. In nanoscale technologies, the physical and chemical properties of materials are fundamentally different compared to the larger scales. Therefore, it is necessary to revise the conventional reliability assessment techniques considering their applicability to nanoscale integrated circuits. This paper presents a method for evaluating the circuit reliability at the transistor level of abstraction considering the physical characteristics of the transistors. The proposed method considers various parameters, including the probability of different types of a transistor failure, the topology of logic gates and the logical values of the applied input vectors. Experimental results show that the proposed approach provides accurate transistor-level circuit reliability evaluations (with 4% inaccuracy) as compared to a reference method based on Monte Carlo HSPICE simulations in addition to more than 800 times speedup. Moreover, to show the comprehensiveness and extensibility of the proposed reliability analysis method for the technologies beyond conventional MOSFETs, it is applied to carbon nanotube field-effect transistor (CNFFT) technology as one of the most promising candidates for future CMOS circuits. The obtained results re-acknowledge that in order to achieve a more accurate reliability estimation approach for CNFET circuits, it is necessary to consider the open and short failure probability values individually instead of considering them in the form of a single transistor failure probability.
机译：由于数字集成电路电子学中积极的技术扩展，电路可靠性正成为越来越大的挑战。在纳米技术中，与较大规模的材料相比，材料的物理和化学性质根本不同。因此，有必要考虑到其对纳米级集成电路的适用性来修改传统的可靠性评估技术。本文提出了一种在考虑晶体管物理特性的情况下，在晶体管抽象级别上评估电路可靠性的方法。所提出的方法考虑了各种参数，包括不同类型的晶体管故障的概率，逻辑门的拓扑以及所施加的输入矢量的逻辑值。实验结果表明，与基于蒙特卡洛HSPICE仿真的参考方法相比，该方法可提供准确的晶体管级电路可靠性评估（不超过4％的误差），而且可提速超过800倍。此外，为了展示所提出的可靠性分析方法对常规MOSFET以外技术的全面性和可扩展性，它被用作碳纳米管场效应晶体管（CNFFT）技术，是未来CMOS电路最有希望的候选者之一。所获得的结果再次确认，为了对CNFET电路实现更准确的可靠性估计方法，必须单独考虑开路和短路故障概率值，而不是以单个晶体管故障概率的形式考虑它们。

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