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首页> 外文期刊>Journal of Electronic Testing >A Novel EDA Tool for VLSI Test Vectors Management
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A Novel EDA Tool for VLSI Test Vectors Management

机译：用于VLSI测试向量管理的新型EDA工具

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In today’s semiconductor industry, where time-to-profit is a critical factor to remain competitive, missing the tight market window might have serious implications including the risk of product cancellation. This places severe pressure on every aspect related to the design and the verification of semiconductor chips to get the design ready for manufacturing in the shortest time possible. To avoid the need for costly corrective steps and silicon re-spins during post-silicon verification, thorough pre-silicon verification is essential to catch any design fault and estimate the design overall reliability before the design is manufactured. This paper presents a novel EDA tool that helps the verification team improve the verification process in several ways. It can be used to generate useful statistics regarding the complexity and the coverage of the created test vectors. Experimental results prove that the verification team can successfully use the proposed tool to set their target coverage and intelligently select the set of test vectors that achieves that target using the minimum number of computing cycles.
机译：在当今的半导体行业中，赢利时间是保持竞争力的关键因素，错过紧缩的市场窗口可能会带来严重的影响，包括产品取消的风险。这给与设计和半导体芯片验证有关的各个方面都施加了巨大压力，以使设计可以在最短的时间内准备就绪。为避免在后硅验证期间需要昂贵的校正步骤和重新生产硅，彻底的硅前验证对于捕捉任何设计错误并在设计制造之前评估设计总体可靠性至关重要。本文介绍了一种新颖的EDA工具，可帮助验证团队以多种方式改进验证过程。它可用于生成有关创建的测试向量的复杂性和覆盖范围的有用统计信息。实验结果证明，验证团队可以成功地使用提出的工具设置目标覆盖范围，并使用最少的计算周期数来智能地选择达到目标的测试向量集。

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