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首页> 外文期刊>Journal of information and optimization sciences >Clustering based power optimization of digital circuits for FPGAs
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Clustering based power optimization of digital circuits for FPGAs

机译：FPGA的基于集群的数字电路功率优化

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摘要

The high performance of FPGAs is always the centre of attraction for developing real time embedded devices. But due to their complex circuitry the matter of increasing power utilization can never be ignored. The matter of increasing power utilization in FPGAs is not new and has been addressed in the literature by the researchers previously. Various power efficient models and techniques have been proposed by researchers in last few decades. This paper proposes a new statistical (regression based) power estimation model targeted for low power applications. Around 30 digital circuits have been synthesized using Xilinx Synthesis Tool and power is visualized using Xpower Analyzer and estimated using a power estimation model. The proposed power estimation model shows large deviation in estimating power of some of the digital circuits modelled with power reduction technique. So, this paper also applies k-means clustering algorithm on the parameters obtained after synthesis and power analysis for identifying different types of digital circuits grouped into different clusters. The result shows a good circuit clustering differentiation and it helps in Improving the proposed model by reducing the estimation error.
机译：FPGA的高性能始终是开发实时嵌入式设备的重点。但是由于它们复杂的电路，增加功率利用率的问题永远不能忽略。在FPGA中提高功耗利用率的问题并不是什么新问题，以前的研究人员已经在文献中解决了这一问题。在过去的几十年中，研究人员提出了各种节能模型和技术。本文提出了一种针对低功率应用的新型统计（基于回归）功率估计模型。使用Xilinx综合工具已经合成了大约30个数字电路，并使用Xpower分析器可视化了功率，并使用功率估计模型对其进行了估计。所提出的功率估计模型在用功率降低技术建模的某些数字电路的功率估计中显示出很大的偏差。因此，本文还对合成和功率分析后获得的参数应用k均值聚类算法，以识别分组为不同簇的不同类型的数字电路。结果显示出良好的电路聚类微分，并有助于通过减少估计误差来改进所提出的模型。

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  • 来源
    《Journal of information and optimization sciences》 |2017年第6期|1029-1037|共9页
  • 作者

    Gaurav Verma; Chetna Dabas; Ashish Goel; Manish Kumar; Vijay Khare;

  • 作者单位

    Jaypee Institute of Information Technology A-10, Sector-62 Noida 201307 Uttar Pradesh India;

    Jaypee Institute of Information Technology A-10, Sector-62 Noida 201307 Uttar Pradesh India;

    Jaypee Institute of Information Technology A-10, Sector-62 Noida 201307 Uttar Pradesh India;

    Jaypee Institute of Information Technology A-10, Sector-62 Noida 201307 Uttar Pradesh India;

    Jaypee Institute of Information Technology A-10, Sector-62 Noida 201307 Uttar Pradesh India;

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  • 原文格式 PDF
  • 正文语种 eng
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  • 关键词

    K-means; Xpower; Slice; I/O; FPGAs; Clustering; Optimization.;

    机译：K-均值Xpower;切片;输入/输出;FPGA;集群;优化。;

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