Electrical Characterization and Parameter Extraction of Junctionless Nanowire Transistors

Rudenko Tamara; Barraud Sylvain; Georgiev Yordan M.; Lysenko Vladimir; Nazarov Alexey

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Electrical Characterization and Parameter Extraction of Junctionless Nanowire Transistors

机译：无结纳米线晶体管的电学表征和参数提取

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This article presents a review of various methods for extracting the key parameters of junctionless (JL) MOSFETs, namely, the threshold voltage, flat-band voltage, doping concentration, carrier mobility, and parasitic series resistance. The applicability and limitations of different methods are analyzed using numerical simulations and experimental data for planar and tri-gate nanowire JL transistors with various nanowire widths.

机译：本文介绍了提取无结（JL）MOSFET关键参数的各种方法，即阈值电压，平带电压，掺杂浓度，载流子迁移率和寄生串联电阻。使用数值模拟和实验数据分析了具有不同纳米线宽度的平面和三栅极纳米线JL晶体管的不同方法的适用性和局限性。

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来源
《Journal of nano research》 |2016年第2016期|17-33|共17页
作者
Rudenko Tamara; Barraud Sylvain; Georgiev Yordan M.; Lysenko Vladimir; Nazarov Alexey;
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作者单位

NASU, Inst Semicond Phys, Prospect Nauki 45, UA-03028 Kiev, Ukraine;

CEA, LETI, MINATEC Campus,17 Rue Martyrs, F-38054 Grenoble 9, France;

Natl Univ Ireland Univ Coll Cork, Dept Chem, Mat Chem & Anal Grp, Cork, Ireland|Natl Univ Ireland Univ Coll Cork, Tyndall Natl Inst, Cork, Ireland|Trinity Coll Dublin, AMBER CRANN, Dublin 2, Ireland;

NASU, Inst Semicond Phys, Prospect Nauki 45, UA-03028 Kiev, Ukraine;

NASU, Inst Semicond Phys, Prospect Nauki 45, UA-03028 Kiev, Ukraine;

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正文语种 eng
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关键词
Junctionless transistors; multi-gate MOSFETs; silicon-on-insulator (SOI); threshold voltage; flat-band voltage; doping concentration; mobility;

机译：无结晶体管;多栅极MOSFET;绝缘体上硅（SOI）;阈值电压;平坦带电压;掺杂浓度;迁移率;

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1. Revisited parameter extraction methodology for electrical characterization of junctionless transistors [J] . D.-Y. Jeon, S.J. Park, M. Mouis, Solid-State Electronics . 2013,第deca期

机译：再论参数提取方法，用于无结晶体管的电气表征
2. Junctionless nanowire transistors parameters extraction based on drain current measurements [J] . Trevisoli Renan, Doria Rodrigo T., de Souza Michelly, Solid-State Electronics . 2019,第AUGa期

机译：基于漏极电流测量的无结纳米线晶体管参数提取
3. Junctionless nanowire transistors parameters extraction based on drain current measurements [J] . Trevisoli Renan, Doria Rodrigo T., de Souza Michelly, Solid-State Electronics . 2019,第Auga期

机译：无连接纳米线晶体管参数提取基于漏极电流测量
4. Analysis of the Electrical Parameters in SOI n-type Junctionless Nanowire Transistors at High Temperatures [C] . T. A. Ribeiro, M. A. Pavanello Latin America Electron Devices Conference . 2020

机译：高温下SOI n型无结纳米线晶体管的电学参数分析
5. Light-matter interactions in semiconductor nanowires: Light-effect transistor and light-induced changes in electron-phonon coupling and electrical characteristics. [D] . Marmon, Jason Kendrick. 2016

机译：半导体纳米线中的光-物质相互作用：光效应晶体管以及电子-声子耦合和电特性的光诱导变化。
6. Characterizing the electrical properties of raised S/D junctionless thin-film transistors with a dual-gate structure [O] . Ya-Chi Cheng, Hung-Bin Chen, Jun-Ji Su, 2014

机译：表征具有双栅结构的凸起S / D无结薄膜晶体管的电性能
7. Analysis of the Electrical Parameters of SOI Junctionless Nanowire Transistors at High Temperatures [O] . Thales Augusto Ribeiro, Sylvain Barraud, Marcelo Antonio Pavanello 2021

机译：高温下SOI结纳米线晶体管电气参数分析
8. Design, Fabrication and Characterization of High-Performance Silicon Nanowire Transistors [R] . Li, Q., Zhu, X., Yang, Y., 2008

机译：高性能硅纳米线晶体管的设计，制作和表征

Electrical Characterization and Parameter Extraction of Junctionless Nanowire Transistors

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