...
  • 主题
高级搜索  >
历史搜索 清空历史
首页> 外文期刊>Journal of signal processing systems for signal, image, and video technology >Improving Code Density with Variable Length Encoding Aware Instruction Scheduling
【24h】

Improving Code Density with Variable Length Encoding Aware Instruction Scheduling

机译：通过变长编码感知指令调度提高代码密度

获取原文
获取原文并翻译 | 示例
           
页面导航
  • 摘要
  • 著录项
  • 相似文献
  • 相关主题

摘要

Variable length encoding can considerably decrease code size in VLIW processors by reducing the number of bits wasted on encoding No Operations(NOPs). A processor may have different instruction templates where different execution slots are implicitly NOPs, but all combinations of NOPs may not be supported by the instruction templates. The efficiency of the NOP encoding can be improved by the compiler trying to place NOPs in such way that the usage of implicit NOPs is maximized. Two different methods of optimizing the use of the implicit NOP slots are evaluated: (a) prioritizing function units that have fewer implicit NOPs associated with them and (b) a post-pass to the instruction scheduler which utilizes the slack of the schedule by rescheduling operations with slack into different instruction words so that the available instruction templates are better utilized. Three different methods for selecting basic blocks to apply FU priorization on are also analyzed: always, always outside inner loops, and only outside inner loops only in basic blocks after testing where it helped to decrease code size. The post-pass optimizer alone saved an average of 2.4 % and a maximum of 10.5 % instruction memory, without performance loss. Prioritizing function units in only those basic blocks where it helped gave the best case instruction memory savings of 10.7 % and average savings of 3.0 % in exchange for an average 0.3 % slowdown. Applying both of the optimizations together gave the best case code size decrease of 12.2 % and an average of 5.4 %, while performance decreased on average by 0.1 %.
机译：可变长度编码可以通过减少在编码“无操作”（NOP）上浪费的位数来显着减小VLIW处理器中的代码大小。处理器可能具有不同的指令模板，其中不同的执行时隙隐式为NOP，但是指令模板可能不支持NOP的所有组合。通过编译器尝试以使隐式NOP的使用最大化的方式来放置NOP，可以提高NOP编码的效率。评估了优化使用隐式NOP插槽的两种不同方法：（a）优先处理与之关联的隐式NOP较少的功能单元，以及（b）传递给指令调度器的后传递，该指令通过重新调度来利用调度的松弛时间松弛到不同的指令字中进行操作，以便更好地利用可用的指令模板。还分析了三种不同的方法，这些方法用于选择要应用FU优先级的基本块：始终，始终在内部循环之外，并且仅在测试后在基本块中仅在外部内部循环之外，这有助于减小代码大小。仅通过后优化器就可以平均节省2.4％的内存和最多10.5％的指令内存，而不会降低性能。仅在有助于帮助的最佳基本块中对功能单元进行优先级排序，在最佳情况下，指令存储器节省了10.7％，平均节省了3.0％，而平均速度降低了0.3％。将这两个优化一起应用，在最佳情况下，代码大小减少了12.2％，平均减少了5.4％，而性能平均减少了0.1％。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱：kefu@zhangqiaokeyan.com

京公网安备：11010802029741号 ICP备案号：京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有

  • 客服微信

  • 服务号