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首页> 外文期刊>Journal of VLSI signal processing systems >An Area-efficient Non-uniform Filter Bank for Low Overhead Reconfiguration of Multi-standard Software Radio Channelizers
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An Area-efficient Non-uniform Filter Bank for Low Overhead Reconfiguration of Multi-standard Software Radio Channelizers

机译：用于多标准软件无线电信道器的低开销重新配置的面积有效的非均匀滤波器组

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摘要

The channelizer in a software defined radio (SDR) base station extracts individual radio channels from the digitized wideband input signal at a very high sampling rate. The base station channelizer must be able to simultaneously extract multiple channels of non-uniform bandwidths corresponding to channel bandwidths of different communication standards. Reconfigurability and low complexity are the two key requirements in the SDR channelizer. A new reconfigurable filter bank (FB) architecture based on interpolation and masking technique for SDR channelizers is proposed in this paper. The proposed FB can be used for obtaining very narrow passband channels with extremely low complexity. Using a cascaded structure of the proposed FB, it is possible to extract channels of fractional passband widths by changing the interpolation factor. Design example shows that the proposed FB offers complexity reduction of 84% over the conventional per-channel (PC) approach. The proposed FB has been implemented and tested on Xilinx Virtex 2v3000ffl 152-4 FPGA. Implementation results show that the proposed FB offers area reduction of 48.37%, speed improvement of 52.7% and power reduction of 75.9% over the PC approach.
机译：软件定义无线电（SDR）基站中的信道器以很高的采样率从数字化宽带输入信号中提取各个无线电信道。基站信道器必须能够同时提取与不同通信标准的信道带宽相对应的非均匀带宽的多个信道。可重配置性和低复杂度是SDR通道化器的两个关键要求。提出了一种基于插值和掩蔽技术的SDR信道化器可重构滤波器组（FB）新架构。所提出的FB可用于以非常低的复杂度获得非常窄的通带信道。使用所提出的FB的级联结构，可以通过更改插值因子来提取分数通带宽度的通道。设计示例表明，与传统的每通道（PC）方法相比，所提出的FB可将复杂度降低84％。拟议的FB已在Xilinx Virtex 2v3000ffl 152-4 FPGA上实现和测试。实施结果表明，与PC方法相比，拟议的FB可以减少48.37％的面积，提高52.7％的速度，降低75.9％的功耗。

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