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首页> 外文期刊>Materials science forum >Experimental Study on Mitigation of Lifetime-Limiting Dielectric Cracking in Extreme Temperature 4H-SiC JFET Integrated Circuits
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Experimental Study on Mitigation of Lifetime-Limiting Dielectric Cracking in Extreme Temperature 4H-SiC JFET Integrated Circuits

机译：极端温度4H-SIC JFET集成电路寿命限制介质裂缝的试验研究

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摘要

While NASA Glenn Research Center's "Generation 10" 4H-SiC Junction Field Effect Transistor (JFET) integrated circuits (ICs) have uniquely demonstrated 500 °C electrical operation for durations of over a year, this experimental work has also revealed that physical cracking of chip dielectric passivation layers ultimately limits extreme-environment operating lifetime [1-3]. The prevention of such dielectric passivation cracks should therefore improve IC high temperature durability and yield, leading to more beneficial technology adoption into aerospace, automotive, and energy systems. This report describes Generation 10.2, 11.1, and 11.2 die tested under unbiased and unpackaged accelerated age testing at 500 °C, 600 °C, 720 °C, and 800 °C in air-atmosphere ovens for 100- and 200-hour duration. Additional samples were separately subjected to 10 thermal cycles between the same high temperatures (with 10-hour high-temperature soak each cycle) and 50 °C. It is shown that having two stoichiometric Si_3N_4 layers in the interconnect dielectric stack substantially decreases the amount of dielectric cracking observed following these oven tests.
机译：虽然NASA Glenn Research Center的“生成10”4H-SiC结场效果晶体管（JFET）集成电路（ICS）具有唯一展示的500°C电气操作，用于一年多的持续时间，这项实验工作还揭示了芯片的物理开裂介电钝化层最终限制了极端环境的运行寿命[1-3]。因此，防止这种介电钝化裂缝应提高IC高温耐久性和产量，从而采用更有益的技术采用航空航天，汽车和能源系统。本报告描述了在500℃，600℃，720℃和800℃下在空气 - 大气烘箱中在500℃，600℃，720℃和800℃下测试的10.2,11.1和11.2芯片。在相同的高温（10小时高温浸泡每个循环）和50℃之间分别对另外的样品分别进行10个热循环。示出互连电介质堆中的两个化学计量Si_3N_4层基本上降低了在这些烘箱测试之后观察到的介电裂缝的量。

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