DESIGN OF A TRIGGER PULSE OPERATED LOW POWER DOMINO BUFFER CIRCUIT

Amit Kumar Pandey; Vivek Mishra; Ram Awadh Mishra; Rajendra Kumar Nagaria; V. Krishna Rao Kandanvli

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DESIGN OF A TRIGGER PULSE OPERATED LOW POWER DOMINO BUFFER CIRCUIT

机译：触发脉冲操作的低功耗多米诺缓冲电路的设计

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摘要

This paper presents the design of buffer circuit using domino CMOS style. The objective of this work is to presents the domino circuits to behave like static CMOS circuit. This technique helps in reducing redundant switching at dynamic and output nodes and saves dynamic power consumption. Proposed circuit pass propagation of precharge pulse to the dynamic node and avoids to the output node. The design is simulated using 0.18µm CMOS technology. Several simulations conducted using different load capacitors, clock frequency, temperature variation and voltage supplies. Simulation results illustrate the superiority of the proposed circuit against standard footless domino circuit, single phase domino circuit and static switching pulse domino circuit in terms of power consumption, delay and power delay product.

机译：本文介绍了采用多米诺CMOS风格的缓冲电路的设计。这项工作的目的是提出多米诺骨牌电路，使其表现得像静态CMOS电路。该技术有助于减少动态节点和输出节点的冗余切换，并节省动态功耗。建议的电路将预充电脉冲的传播传递到动态节点，并避免传递到输出节点。使用0.18µm CMOS技术对设计进行仿真。使用不同的负载电容器，时钟频率，温度变化和电源电压进行了多次仿真。仿真结果说明了所提出的电路在功耗，延迟和功率延迟乘积方面优于标准的无脚多米诺电路，单相多米诺电路和静态开关脉冲多米诺电路。

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来源
《The mediterranean journal of electronics and communications》 |2013年第1期|485-493|共9页
作者
Amit Kumar Pandey; Vivek Mishra; Ram Awadh Mishra; Rajendra Kumar Nagaria; V. Krishna Rao Kandanvli;
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作者单位

Department of Electronics and Communication, M.N.N.I.T, Allahabad, 211004 India;

Department of Electronics and Communication, M.N.N.I.T, Allahabad, 211004 India;

Department of Electronics and Communication, M.N.N.I.T, Allahabad, 211004 India;

Department of Electronics and Communication, M.N.N.I.T, Allahabad, 211004 India;

Department of Electronics and Communication, M.N.N.I.T, Allahabad, 211004 India;

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原文格式 PDF
正文语种 eng
中图分类
关键词
Buffer; Domino circuit; Delay; Precharge pulse; Power consumption; Trigger Pulse;

机译：缓冲;多米诺电路;延迟;预充电脉冲;能量消耗;触发脉冲;

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DESIGN OF A TRIGGER PULSE OPERATED LOW POWER DOMINO BUFFER CIRCUIT

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