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Energy efficiency of error control coding in intra-chip RF/wireless interconnect systems

机译：片内RF /无线互连系统中错误控制编码的能效

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摘要

Continuous scaling of conventional hard-wired metal interconnects into deep sub-micrometer region (DSM) has resulted in significant performance degradation in terms of delay, crosstalk noise, higher power dissipation, and decreased tolerance to noise. Besides, communication-centric nature of system-on-chip (SOC) networks requires efficient intra- and inter-chip interconnect technologies. Radio-frequency (RF)/wireless interconnects promise to be the best alternative to metal interconnects as they are compatible with current CMOS-technology, and they also provide higher data rate and bidirectional multi I/O transmissions. This paper evaluates the system bit-error-rate (BER) performance with the application of fault-tolerance capability using linear error-control codes (ECCs) within chip (intra-chip) RF/wireless interconnect systems. It also evaluates the utility of ECCs by considering energy consumed in ECC encoding-decoding vis-a-vis the energy saved due to coding gain by calculating the critical distance (d_(cr)). The results indicate that for a certain range of received signal-to-noise ratio (SNR), application of ECC improves the BER performance of the RF/wireless interconnect system. It is also shown that d_(cr) drops to 0.7 mm at 18 GHz.
机译：传统硬连线金属互连的连续缩放到深亚微米区域（DSM），导致延迟，串扰噪声，更高的功耗以及降低的噪声容忍度方面的显着性能下降。此外，片上系统（SOC）网络的以通信为中心的本质需要高效的片内和片间互连技术。射频（RF）/无线互连有望与金属CMOS兼容，因为它与当前的CMOS技术兼容，并且还提供更高的数据速率和双向多I / O传输。本文利用容错能力的应用，使用芯片（芯片内）RF /无线互连系统中的线性错误控制码（ECC）来评估系统误码率（BER）性能。通过计算临界距离（d_（cr）），它还考虑了ECC编码解码所消耗的能量，从而相对于由于编码增益而节省的能量，从而评估了ECC的效用。结果表明，对于一定范围的接收信噪比（SNR），ECC的应用可以改善RF /无线互连系统的BER性能。还显示出，d_（cr）在18 GHz下下降至0.7 mm。

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