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A CMOS vector lock-in amplifier for sensor applications

机译:用于传感器应用的CMOS矢量锁相放大器

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The design of an integrated lock-in amplifier is discussed, specifically conceived for the detection of low-level signals at a harmonic of the drive frequency in magnetically excited resonant structures. The circuit includes in-phase and quadrature analogue signal processing channels, whose outputs feed an integrated ∑Δ analogue to digital converter. The circuit can be operated in different configurations, depending on the application requirements: in particular, by combining the digitized outputs of the two channels, vector operation can be obtained. The entire analogue chain, including the ∑Δ modulator, was designed using fully differential elaboration. The circuit was developed in a 0.35 μm, dual poly-Si, four metal layers analogue CMOS technology with high resistivity poly-Si option. Circuit performance is discussed on the basis of transistor-level simulations and measurement results.
机译:讨论了集成锁相放大器的设计,特别是为在磁激励谐振结构中检测驱动频率谐波下的低电平信号而设计的。该电路包括同相和正交模拟信号处理通道,其输出馈入集成的∑Δ模数转换器。该电路可以根据应用需求以不同的配置进行操作:特别是通过组合两个通道的数字化输出,可以获得矢量操作。包括∑Δ调制器在内的整个模拟链均采用完全差分精巧设计。该电路采用0.35μm双多晶硅,四金属层模拟CMOS技术开发,具有高电阻率多晶硅选项。在晶体管级仿真和测量结果的基础上讨论了电路性能。

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