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Hybrid verification integrating HOL theorem proving with MDG model checking

机译:结合了HOL定理证明和MDG模型检查的混合验证

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摘要

In this paper, we describe a hybrid tool for hardware formal verification that links the HOL (higher-order logic) theorem prover and the MDG (multiway decision graphs) model checker. Our tool supports abstract datatypes and uninterpreted function symbols available in MDG, allowing the verification of high-level specifications. The hybrid tool, HOL-MDG, is based on an embedding in HOL of the grammar of the hardware modeling language, MDG-HDL, as well as an embedding of the first-order temporal logic L_(mdg) used to express properties for the MDG model checker. Verification with the hybrid tool is faster and more tractable than using either tools separately. We hence obtain the advantages of both verification paradigms.
机译:在本文中,我们描述了一种用于硬件形式验证的混合工具,该工具链接了HOL(高阶逻辑)定理证明者和MDG(多路决策图)模型检查器。我们的工具支持MDG中提供的抽象数据类型和未解释的功能符号,从而可以验证高级规范。混合工具HOL-MDG基于硬件建模语言MDG-HDL的语法在HOL中的嵌入,以及用于表达硬件特性的一阶时间逻辑L_(mdg)的嵌入。 MDG模型检查器。与单独使用这两种工具相比,使用混合工具进行的验证更快,更容易处理。因此,我们获得了两种验证范例的优势。

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