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Modeling of noise for p-channel DG-FinFETs

机译：p通道DG-FinFET的噪声建模

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摘要

The noise performance of p-channel Double Gate FinFETs has been studied with varying structural parameters. The effects of mobility degradation due to velocity saturation, carrier heating and channel length modulation have been taken into consideration for an accurate modeling of noise. The dependence of mobility fluctuations on the inversion carrier density has been incorporated. This has been validated by the experimental results. The noise behavior of p-channel device has been compared to that of a corresponding n-channel device. It has been observed that noise in p-channel device is comparatively higher due to higher number of oxide-trap density in it. Further, it has been noted that with the same trap density in both p-channel and n-channel device, the flicker noise in the p-channel device is lower than that of the corresponding n-channel device.
机译：已经研究了具有不同结构参数的p沟道双栅极FinFET的噪声性能。对于噪声的精确建模，已经考虑了由于速度饱和，载流子加热和通道长度调制而导致的迁移率降低的影响。迁移率波动对反向载流子密度的依赖性已被纳入。实验结果证实了这一点。已将p通道设备的噪声行为与相应的n通道设备的噪声行为进行了比较。已经观察到，p沟道器件中的噪声相对较高，这是由于其中的氧化物陷阱密度更高。此外，已经注意到，在p沟道器件和n沟道器件两者中具有相同的陷阱密度的情况下，p沟道器件中的闪烁噪声低于相应的n沟道器件的闪烁噪声。

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  • 来源
    《Microelectronics reliability》 |2012年第6期|p.984-988|共5页
  • 作者

    Srabanti Pandit; Binit Syamal; C.K. Sarkar;

  • 作者单位

    Nano Device Simulation laboratory. Electronics and Telecommunication Engineering Department, Jadavpur University, Kolkata 700 032, India;

    Nano Device Simulation laboratory. Electronics and Telecommunication Engineering Department, Jadavpur University, Kolkata 700 032, India;

    Nano Device Simulation laboratory. Electronics and Telecommunication Engineering Department, Jadavpur University, Kolkata 700 032, India;

  • 收录信息 美国《科学引文索引》(SCI);美国《工程索引》(EI);
  • 原文格式 PDF
  • 正文语种 eng
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