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FPGA-based implementation alternatives for the inner loop of the Secure Hash Algorithm SHA-256

机译：安全散列算法SHA-256内环的基于FPGA的实现方案

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摘要

Hash function algorithms are widely used to provide security services of integrity and authentication, being SHA-2 the latest set of hash algorithms standardized by the US Federal Government. The main computation block in SHA-2 algorithms is governed by a loop with high data dependence for which several implementation strategies are explored in this work as well as designs efficiently mapped to hardware architectures. Four new different hardware architectures are proposed to improve the performance of SHA-256 algorithms, reducing the critical path by reordering some operations required at each iteration of the algorithm and computing some values in advance, as possible as data dependence allows. The proposed designs were implemented and validated in the FPGA Virtex-2 XC2VP-7. The achieved results show a significant improvement on the performance of the SHA-256 algorithm compared to similar previously proposed approaches, obtaining a throughput of 909 Mbps and an improved efficiency of 0.713 Mbps/ slice.
机译：哈希函数算法被广泛用于提供完整性和身份验证的安全服务，它是SHA-2最新的由美国联邦政府标准化的哈希算法集。 SHA-2算法中的主要计算模块由一个具有高数据依赖性的循环控制，为此在本工作中探索了几种实现策略以及有效映射到硬件体系结构的设计。提出了四个新的不同硬件体系结构，以提高SHA-256算法的性能，通过对算法每次迭代所需的一些操作进行重新排序并在可能的情况下提前计算一些值（在数据依赖的情况下）来减少关键路径。拟议的设计已在FPGA Virtex-2 XC2VP-7中实现和验证。与类似的先前提出的方法相比，所获得的结果表明SHA-256算法的性能有了显着提高，获得了909 Mbps的吞吐量和0.713 Mbps /条的改进效率。

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  • 来源
    《Microprocessors and microsystems》 |2013年第7期|750-757|共8页
  • 作者

    I. Algredo-Badillo; C. Feregrino-Uribe; R. Cumplido; M. Morales-Sandoval;

  • 作者单位

    Computer Engineering, University of Istmo, Tehuantepec, Oaxaca 70760, Mexico;

    National Institute for Astrophysics, Optics and Electronics, Santa. Ma. Tonantzintla, Puebla 72840, Mexico;

    National Institute for Astrophysics, Optics and Electronics, Santa. Ma. Tonantzintla, Puebla 72840, Mexico;

    Polytechnic University of Victoria, Information Technology Department, Tamaulipas 87138, Mexico;

  • 收录信息 美国《科学引文索引》(SCI);美国《工程索引》(EI);
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

    SHA-2; Hash function; FPGA;

    机译：SHA-2;哈希函数;现场可编程门阵列;

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