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首页> 外文期刊>IEEE transactions on multimedia >Implementing the 2-D Wavelet Transform on SIMD-Enhanced General-Purpose Processors
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Implementing the 2-D Wavelet Transform on SIMD-Enhanced General-Purpose Processors

机译：在增强SIMD的通用处理器上实现2-D小波变换

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摘要

The 2-D Discrete Wavelet Transform (DWT) consumes up to 68% of the JPEG2000 encoding time. In this paper, we develop efficient implementations of this important kernel on general-purpose processors (GPPs), in particular the Pentium 4 (P4). Efficient implementations of the 2-D DWT on the P4 must address three issues. First, the P4 suffers from a problem known as 64K aliasing, which can degrade performance by an order of magnitude. We propose two techniques to avoid 64K aliasing which improve performance by a factor of up to 4.20. Second, a straightforward implementation of vertical filtering incurs many cache misses. Cache performance can be improved by applying loop interchange, but there will still be many conflict misses if the filter length exceeds the cache associativity. Two methods are proposed to reduce the number of conflict misses which provide an additional performance improvement of up to 1.24. To show that these methods are general, results for the P3 and Opteron are also provided. Third, efficient implementations of the 2-D DWT must exploit the SIMD instructions supported by most GPPs, including the P4, and we present MMX and SSE implementations of horizontal and vertical filtering which provide a maximum speedup of 3.39 and 6.72, respectively.
机译：二维离散小波变换（DWT）最多消耗JPEG2000编码时间的68％。在本文中，我们在通用处理器（GPP），特别是Pentium 4（P4）上开发了此重要内核的有效实现。 P4上二维DWT的有效实现必须解决三个问题。首先，P4遭受称为64K混叠的问题，这可能会使性能降低一个数量级。我们提出了两种避免64K混叠的技术，它们可将性能提高多达4.20倍。其次，垂直过滤的直接实现会导致许多缓存未命中。可以通过应用循环交换来提高缓存性能，但是如果过滤器长度超过缓存关联性，仍然会发生许多冲突遗漏。提出了两种方法来减少冲突未命中的次数，这可提供高达1.24的额外性能改进。为了说明这些方法是通用的，还提供了P3和Opteron的结果。第三，2-D DWT的有效实现必须利用大多数GPP（包括P4）支持的SIMD指令，并且我们提出了水平和垂直滤波的MMX和SSE实现，分别提供了3.39和6.72的最大加速。

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