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FPGA realization of a speech encryption system based on a generalized modified chaotic transition map and bit permutation

机译：基于广义改进混沌过渡图和位置换的语音加密系统的FPGA实现

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摘要

This paper proposes a generalized modified chaotic transition map with three independent parameters. A hardware speech encryption scheme utilizing this map along with a bit permutation network is presented. While the transition map's generalization introduces additional parameters, the modification enhances its chaotic properties and overcomes the finite range of the control parameter and dynamical degradation problems. The modification also presents a simplification for the hardware realization of the exponentiation operation in the map's equation because the modified output range allows conversion from the linear domain to the Logarithmic Number System (LNS). Mathematical analysis of the map is presented, where exact nonlinear expressions of the dependent parameters are derived and validated through simulations. To further simplify the hardware realization, the complicated nonlinear expressions are linearized and the introduced approximation error is quite acceptable. The encryption scheme is simulated using Xilinx ISE 14.7 and realized on Xilinx Nexys 4 Artix-7 FPGA with a throughput of 1.526 Gbit/sec. The security and efficiency of the hardware speech encryption scheme are validated and the performance is compared with recent works that provided experimental results on Pseudo-Random Number Generation (PRNG) and speech encryption.
机译：本文提出了具有三个独立参数的广义修正混沌过渡图。提出了利用该映射和比特置换网络的硬件语音加密方案。过渡图的泛化引入了其他参数，而修改则增强了其混沌特性，并克服了控制参数的有限范围和动态退化问题。由于修改后的输出范围允许从线性域到对数系统（LNS）的转换，因此该修改还简化了地图方程式中幂运算的硬件实现。提出了地图的数学分析，其中通过仿真推导并验证了相关参数的精确非线性表达式。为了进一步简化硬件实现，将复杂的非线性表达式线性化，引入的近似误差是完全可以接受的。加密方案使用Xilinx ISE 14.7仿真，并在Xilinx Nexys 4 Artix-7 FPGA上实现，吞吐量为1.526 Gbit / sec。验证了硬件语音加密方案的安全性和效率，并将其性能与提供伪随机数生成（PRNG）和语音加密实验结果的最新工作进行了比较。

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