We have newly developed a 1Gb Double Data Rate-Synchronous DRAM (DDRAM) realizing 250Mbps/pin using a 0.18μm fabrication process. The 1Gb DDR-SDRAM features (1) a Bi- Directional Delay (BDD) that realizes an internal clock generator achieving a low-jitter, small-area, and short Lock time, (2) a Quad-Coupled Receiver (QCR) to reduce the internal skew between rise input and fall input Propagation delay time, and (3) an Inter-Bank Shared Redundancy Scheme (ISR) with a Variable Unit Redundancy (VUR) to increase yield.
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