首页> 外文期刊>NEC Research & Development >Trend of Low-Power LSI Circuit Techniques
【24h】

Trend of Low-Power LSI Circuit Techniques

机译:低功耗LSI电路技术的趋势

获取原文
获取原文并翻译 | 示例
           

摘要

This equation shows a number of ways to conceptualize low-power circuit techniques. In order to reduce circuit power consumption, low supply voltage operation and small voltage swing operation are effective, as seen from Eq. (1). Scaling down design rule also requires lowering supply voltage to avoid the degradation of device reliability due to the hot-electron effect. On the other hand, high performance is also required in most cases, in addition to low-power consumption. In order to overcome performance degradation by lowered supply voltage, low threshold MOS devices are used. However, lowering threshold voltage brings sub-threshold leakage current, which is primarily determined by a device structure and its fabrication techniques.
机译:该方程式显示了许多概念化低功耗电路技术的方法。为了减少电路功耗,从等式1可以看出,低电源电压操作和小电压摆幅操作是有效的。 (1)。缩小设计规则还需要降低电源电压,以避免由于热电子效应而降低器件可靠性。另一方面,除了低功耗以外,在大多数情况下还需要高性能。为了克服由于电源电压降低而导致的性能下降,使用了低阈值MOS器件。但是,降低阈值电压会带来亚阈值泄漏电流,这主要由器件结构及其制造技术决定。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号