MIMO equalization optimized for baud rate clock recovery in coherent 112 Gbit/sec DP-QPSK metro systems

Gorshtein Albert; Sadot Dan; Dorman Guy

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MIMO equalization optimized for baud rate clock recovery in coherent 112 Gbit/sec DP-QPSK metro systems

机译：MIMO均衡优化，用于相干112 Gbit / sec DP-QPSK城域系统中的波特率时钟恢复

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摘要

A novel MIMO equalization architecture optimized for baud rate clock recovery (BCR-MIMO) in coherent 112 Gbit/sec dual polarization quadrature phase shift keying (DP-QPSK) metro systems is proposed. This architecture is designed to decouple between multiple-input-multiple-output (MIMO) equalization and clock recovery (CR) loops, avoiding the interaction between them. The decoupling between the two loops is achieved, while maintaining similar MIMO equalizer performance, as compared to the butterfly-structured equalizer. (C) 2015 Elsevier Inc. All rights reserved.

机译：提出了一种针对相干112 Gbit / sec双极化正交相移键控（DP-QPSK）城域系统中的波特率时钟恢复（BCR-MIMO）优化的新型MIMO均衡架构。该体系结构旨在在多输入多输出（MIMO）均衡和时钟恢复（CR）循环之间解耦，从而避免了它们之间的相互作用。与蝶形结构的均衡器相比，实现了两个环路之间的去耦，同时保持了类似的MIMO均衡器性能。（C）2015 Elsevier Inc.保留所有权利。

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来源
《Optical fiber technology》 |2015年第3期|23-27|共5页
作者
Gorshtein Albert; Sadot Dan; Dorman Guy;
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作者单位

Ben Gurion Univ Negev, Dept Elect & Comp Engn, IL-84105 Beer Sheva, Israel;

Ben Gurion Univ Negev, Dept Elect & Comp Engn, IL-84105 Beer Sheva, Israel;

MultiPhy Ltd, Ness Ziona, Israel;

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收录信息美国《科学引文索引》(SCI);美国《工程索引》(EI);
原文格式 PDF
正文语种 eng
中图分类
关键词
Coherent communication; Digital signal processing; Maximum likelihood sequence estimation (MLSE); Symbol spaced equalization; Adaptive MIMO equalization; Baud rate clock recovery;

机译：相干通信;数字信号处理;最大似然序列估计（MLSE）;符号间隔均衡;自适应MIMO均衡;波特率时钟恢复;

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专利

1. All-Digital Timing Recovery and Adaptive Equalization for 112 Gbit∕s POLMUX-NRZ-DQPSK Optical Coherent Receivers [J] . Zhou XianChen XueZhou WeiqingFan YangyangZhu HaiLi Zhiyu Optical Communications and Networking, IEEE/OSA Journal of . 2010,第11期

机译：112 Gbits POLMUX-NRZ-DQPSK光相干接收机的全数字定时恢复和自适应均衡
2. Novel Non-Data-Aided Clock Recovery Method for DP-QPSK Systems With CMA Equalizers [J] . Portela T. F., Mello D. A. A. Photonics Technology Letters, IEEE . 2012,第19期

机译：具有CMA均衡器的DP-QPSK系统的新型非数据辅助时钟恢复方法
3. Design Techniques for a 60-Gb/s 288-mW NRZ Transceiver With Adaptive Equalization and Baud-Rate Clock and Data Recovery in 65-nm CMOS Technology [J] . Jaeduk Han, Nicholas Sutardja, Yue Lu, Solid-State Circuits, IEEE Journal of . 2017,第12期

机译：具有自适应均衡和波特率时钟以及65nm CMOS技术中的数据恢复功能的60Gb / s 288mW NRZ收发器的设计技术
4. Nonlinear Equalization in 40/112/224 Gbit/s Mixed Line Rate 15-Channel DP-QPSK and DP-16QAM Contiguous Spectrum Based Networks [C] . Rameez Asif Asia Communications and Photonics Conference . 2014

机译：40/112/224 Gbit / s混合线速15通道DP-QPSK和DP-16QAM连续频谱网络中的非线性均衡
5. High-speed and multi-bitrate clock and data recovery system based on half-rate clocking [D] . Hong, Sung-Hwan (David) 2005

机译：基于半速率时钟的高速多比特时钟和数据恢复系统
6. Iterative Analog–Digital Multi-User Equalizer for Wideband Millimeter Wave Massive MIMO Systems [O] . Roberto Magueta, Daniel Castanheira, Pedro Pedrosa, 2020

机译：宽带毫米波大规模MIMO系统的迭代模拟-数字多用户均衡器
7. Data-Aided Frequency-Domain 2×2 MIMO Equalizer for 112 Gbit/s PDM-QPSK Coherent Transmission Systems [O] . Pittalà Fabio, Hauske Fabian N., Ye Yabin, 2012

机译：用于112 Gbit / s pDm-QpsK相干传输系统的数据辅助频域2×2 mImO均衡器

MIMO equalization optimized for baud rate clock recovery in coherent 112 Gbit/sec DP-QPSK metro systems

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