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Design Space Exploration of 2-D Processor Array Architectures for Similarity Distance Computation

机译:相似距离计算的二维处理器阵列架构的设计空间探索

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摘要

We present a systematic methodology for exploring the design space of similarity distance computation in machine learning algorithms. Previous architectures proposed in the literature have been obtained using ad hoc techniques that do not allow for design space exploration. The size and dimensionality of the input datasets have not been taken into consideration in previous works. This may result in impractical designs that are not amenable for hardware implementation. The methodology presented in this work is used to obtain the 3-D computation domain of the similarity distance computation algorithm. A scheduling function determines whether an algorithm variable is pipelined or broadcast. Four linear scheduling functions are presented, and six possible 2-D processor array architectures are obtained and classified based on the size and dimensionality of the input datasets. The obtained designs are analyzed in terms of speed and area, and compared with previously obtained designs. The proposed designs achieve better time and area complexities.
机译:我们提出了一种系统的方法,用于探索机器学习算法中相似距离计算的设计空间。文献中提出的先前架构是使用不允许进行设计空间探索的临时技术获得的。在先前的工作中没有考虑输入数据集的大小和维数。这可能导致不适合硬件实现的不切实际的设计。这项工作中介绍的方法用于获得相似距离计算算法的3-D计算域。调度功能确定算法变量是流水线还是广播。提出了四个线性调度功能,并根据输入数据集的大小和维数获得了六种可能的2-D处理器阵列架构并将其分类。对获得的设计进行速度和面积分析,并与先前获得的设计进行比较。所提出的设计实现了更好的时间和区域复杂性。

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