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A Survey of Techniques for Modeling and Improving Reliability of Computing Systems

机译：建模和提高计算系统可靠性的技术概述

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摘要

Recent trends of aggressive technology scaling have greatly exacerbated the occurrences and impact of faults in computing systems. This has made ‘reliability’ a first-order design constraint. To address the challenges of reliability, several techniques have been proposed. This paper provides a survey of architectural techniques for improving resilience of computing systems. We especially focus on techniques proposed for microarchitectural components, such as processor registers, functional units, cache and main memory etc. In addition, we discuss techniques proposed for non-volatile memory, GPUs and 3D-stacked processors. To underscore the similarities and differences of the techniques, we classify them based on their key characteristics. We also review the metrics proposed to quantify vulnerability of processor structures. We believe that this survey will help researchers, system-architects and processor designers in gaining insights into the techniques for improving reliability of computing systems.
机译：积极的技术扩展的最新趋势极大地加剧了计算系统中故障的发生和影响。这使“可靠性”成为一阶设计约束。为了解决可靠性的挑战，已经提出了几种技术。本文提供了用于提高计算系统弹性的体系结构技术的概述。我们特别关注针对微体系结构组件提出的技术，例如处理器寄存器，功能单元，缓存和主内存等。此外，我们还将讨论针对非易失性存储器，GPU和3D堆栈处理器提出的技术。为了强调技术的相似性和差异性，我们根据其关键特征对其进行分类。我们还将审查提出的量化处理器结构脆弱性的指标。我们相信，这项调查将帮助研究人员，系统架构师和处理器设计人员深入了解提高计算系统可靠性的技术。

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