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Efficient Breadth-First Search on the Cell/BE Processor

机译：在Cell / BE处理器上进行有效的广度优先搜索

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摘要

Multi-core processors are a shift of paradigm in computer architecture that promises a dramatic increase in performance. But they also bring an unprecedented level of complexity in algorithmic design and software development. In this paper we describe the challenges involved in designing a breadth-first search (BFS) algorithm for the Cell/B.E. processor. The proposed methodology combines a high-level algorithmic design that captures the machine-independent aspects, to guarantee portability with performance to future processors, with an implementation that embeds processor-specific optimizations. Using a fine-grained global coordination strategy derived by the bulk-synchronous parallel (BSP) model, we have determined an accurate performance model that has guided the implementation and the optimization of our algorithm. Our experiments on a pre-production Cell/B.E. board running at 3.2 GHz, show almost linear speedups when using multiple synergistic processing elements, and an impressive level of performance when compared to other processors. On graphs which offer sufficient parallelism, the Cell/B.E. is typically an order of magnitude faster than conventional processors, such as the AMD Opteron and the Intel Pentium 4 and Woodcrest, and custom-designed architectures, such as the MTA-2 and BlueGene/L.
机译：多核处理器是计算机体系结构范式的转变，有望显着提高性能。但是它们也给算法设计和软件开发带来了前所未有的复杂性。在本文中，我们描述了为Cell / B.E设计广度优先搜索（BFS）算法所涉及的挑战。处理器。所提出的方法结合了捕获了与机器无关的方面的高级算法设计，以确保对未来处理器的性能可移植性以及嵌入了特定于处理器的优化的实现。使用由大块同步并行（BSP）模型导出的细粒度全局协调策略，我们确定了一个精确的性能模型，该模型指导了算法的实现和优化。我们在预生产Cell / B.E。上进行的实验运行于3.2 GHz的主板在使用多个协同处理元件时显示出几乎线性的加速，并且与其他处理器相比具有令人印象深刻的性能水平。在提供足够并行度的图上，Cell / B.E。通常比传统处理器（例如AMD Opteron和Intel Pentium 4和Woodcrest）以及定制设计的体系结构（例如MTA-2和BlueGene / L）快一个数量级。

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