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Efficient assignment and scheduling for heterogeneous DSP systems

机译：异构DSP系统的有效分配和调度

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This paper addresses high level synthesis for real-time digital signal processing (DSP) architectures using heterogeneous functional units (FUs). For such special purpose architecture synthesis, an important problem is how to assign a proper FU type to each operation of a DSP application and generate a schedule in such a way that all requirements can be met and the total cost can be minimized. We propose a two-phase approach to solve this problem. In the first phase, we solve the heterogeneous assignment problem, i.e., how to assign proper FU types to applications such that the total cost can be minimized while the timing constraint is satisfied. In the second phase, based on the assignments obtained in the first phase, we propose a minimum resource scheduling algorithm to generate a schedule and a feasible configuration that uses as little resource as possible. We prove that the heterogeneous assignment problem is NP-complete. Efficient algorithms are proposed to find an optimal solution when the given DFG is a simple path or a tree. Three other algorithms are proposed to solve the general problem. The experiments show that our algorithms can effectively reduce the total cost compared with the previous work.
机译：本文介绍了使用异构功能单元（FU）的实时数字信号处理（DSP）体系结构的高级综合。对于这种特殊用途的体系结构综合，一个重要的问题是如何为DSP应用程序的每个操作分配适当的FU类型，并以可以满足所有要求并使总成本最小化的方式生成时间表。我们提出了一种两阶段方法来解决此问题。在第一阶段，我们解决了异构分配问题，即如何为应用分配适当的FU类型，以便在满足时序约束的同时可以将总成本降至最低。在第二阶段中，基于在第一阶段中获得的分配，我们提出了一种最小资源调度算法来生成调度和使用尽可能少的资源的可行配置。我们证明了异构分配问题是NP完全的。当给定的DFG是简单路径或树时，提出了有效的算法来找到最佳解决方案。提出了三种其他算法来解决一般问题。实验表明，与以前的工作相比，我们的算法可以有效降低总成本。

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