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An efficient memory system for the SIMD construction of a Gaussian pyramid

机译:用于高斯金字塔SIMD构造的高效存储系统

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In this paper, a memory system is introduced for the efficient construction of a Gaussian pyramid. The memory system consists of an address calculating circuit, an address routing circuit, a memory module selection circuit, and 2/sup n/+1 memory modules. The memory system provides parallel access to 2/sup n/ image points whose patterns are a block, a row or a column, where the interval of the column and the block is 1 and the interval of the row is 2/sup l/,l/spl ges/0. The performance of a generic SIMD (single-instruction multiple-data) processor using the proposed memory system is compared with one using an interleaved memory system for the construction of a Gaussian pyramid. The ratio of the time of the construction of level 2 and level 10 from the original image (level 0) of an SIMD processor with an interleaved memory system to that of the proposed memory system is 1.485 and 1.633, respectively.
机译:在本文中,介绍了一种用于高效构造高斯金字塔的存储系统。该存储系统包括地址计算电路,地址路由电路,存储模块选择电路和2 / sup n / + 1个存储模块。存储器系统提供对2 / sup n /个图像点的并行访问,这些图像点的模式是块,行或列,其中列和块的间隔为1,行的间隔为2 / sup l /, l / spl ges / 0。将使用所建议的存储系统的通用SIMD(单指令多数据)处理器的性能与使用交错存储系统进行高斯金字塔构造的性能进行比较。从具有交错存储系统的SIMD处理器的原始图像(级别0)到建议的存储系统,从级别2到级别10的构建时间与所建议的存储系统的时间之比分别为1.485和1.633。

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