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首页> 外文期刊>IEEE Transactions on Parallel and Distributed Systems >The DASH prototype: Logic overhead and performance
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The DASH prototype: Logic overhead and performance

机译：DASH原型：逻辑开销和性能

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摘要

The fundamental premise behind the DASH project is that it is feasible to build large-scale shared-memory multiprocessors with hardware cache coherence. The hardware overhead of directory-based cache coherence in a 48-processor is examined. The data show that the overhead is only about 10-15%, which appears to be a small cost for the ease of programming offered by coherent caches and the potential for higher performance. The performance of the system is discussed, and the speedups obtained by a variety of parallel applications running on the prototype are shown. Using a sophisticated hardware performance monitor, the effectiveness of coherent caches and the relationship between an application's reference behavior and its speedup are characterized. The optimizations incorporated in the DASH protocol are evaluated in terms of their effectiveness on parallel applications and on atomic tests that stress the memory system.
机译：DASH项目背后的基本前提是，构建具有硬件高速缓存一致性的大型共享内存多处理器是可行的。检查了48个处理器中基于目录的缓存一致性的硬件开销。数据显示，开销仅为大约10-15％，对于相干缓存提供的易于编程和更高性能的潜力，这似乎是一笔很小的开销。讨论了系统的性能，并显示了通过在原型上运行的各种并行应用程序获得的加速。使用复杂的硬件性能监视器，可以描述相干缓存的有效性以及应用程序的参考行为与其加速之间的关系。根据DASH协议中包含的优化在并行应用程序和对内存系统造成压力的原子测试上的有效性进行评估。

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