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首页> 外文期刊>Radioelectronics and Communications Systems >Accurate Modeling of Nanoscale Gate Underlap SOI MOSFET and Design of Low Noise Amplifier for RF Applications
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Accurate Modeling of Nanoscale Gate Underlap SOI MOSFET and Design of Low Noise Amplifier for RF Applications

机译：纳米级栅极下覆式SOI MOSFET的精确建模和用于射频应用的低噪声放大器的设计

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摘要

Paper presents an accurate model by accounting non-quasi-static and extrinsic parasitic effects for 90 nm gate underlap SOI MOSFETs for RF applications. Generated Y-parameters from the model up to 20 GHz matched very well with 2D ATLAS (with an average error of～5%), whereas results from quasi-static predictive technology model differ significantly (＞20%). Calculated transit frequencyf_r and maximum frequency of oscillation f_(max) have been found as ～108 and ～130 GHz respectively. Simulated noise figure at drain-to-source current I_(DS)≈0.64 mA and drain-to-source voltage V_(DS)0 = 1 Vwas found to be≈2.8 dB with gate resistance R_(ge) = 3 Ω. A low noise amplifier (LNA) designed at operating frequency of 5.8 GHz using the model has shown good match at input (S_(11)≈-15 dB), output (S_(22)≈-16 dB) and gain (S_(21)≈ 15 dB). A new figure-of-merit of LNA (FoM_(LNA)) involving signal power gain G, noise factor F and dc power consumption P_(dc) has been proposed. By comparing with limited available measured data of 180 nm bulk, it has been found that underlap LNA (simulated using the developed model) gives almost three times improvement in the proposed FoM_(LNA).
机译：论文通过考虑用于RF应用的90 nm栅下重叠SOI MOSFET的非准静态和外部寄生效应，提出了一种准确的模型。从模型生成的高达20 GHz的Y参数与2D ATLAS匹配得很好（平均误差为5％），而准静态预测技术模型的结果却有显着差异（> 20％）。计算出的渡越频率f_r和最大振荡频率f_（max）分别为〜108 GHz和〜130 GHz。在栅极电阻R_（ge）= 3Ω的情况下，漏极-源极电流I_（DS）≈0.64mA和漏极-源极电压V_（DS）0 = 1 V时的模拟噪声系数为≈2.8dB。使用该模型设计的工作频率为5.8 GHz的低噪声放大器（LNA）在输入（S_（11）≈-15dB），输出（S_（22）≈-16dB）和增益（S_（ 21）≈15 dB）。提出了一种包含信号功率增益G，噪声因子F和直流功耗P_（dc）的LNA的新品质因数（FoM_（LNA））。通过与180 nm体积的有限可用测量数据进行比较，发现重叠LNA（使用已开发的模型进行模拟）在拟议的FoM_（LNA）中几乎提高了三倍。

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