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An FPGA-oriented fully parallel algorithm for multiplying dual quaternions

机译:面向FPGA的完全双重四元数乘法的并行算法

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This paper presents a low multiplicative complexity fully parallel algorithm for multiplying two dual quaternions. The "pen-and-paper" multiplication of two dual quaternions requires 64 real multiplications and 56 real additions. More effective solutions still do not exist. We show how to compute a product of two dual quaternions with 24 real multiplications and 64 real additions. During synthesis of the discussed algorithm we use the fact that the product of two dual quaternions can be represented as a matrix-vector product. The matrix multiplicand that participates in the product calculating has unique structural properties that allow performing its advantageous factorization. Namely this factorization leads to significant reducing of the multiplicative complexity of dual quaternion multiplication. We show that by using this approach, the computational process of calculating dual quaternion product can be structured so that eventually requires only half the number of multipliers compared to the direct implementation of matrix-vector multiplication.
机译:本文提出了一种低乘法复杂度的完全并行算法,用于将两个双四元数相乘。两个双四元数的“笔-纸”乘法需要64个实数乘法和56个实数加法。仍然没有更有效的解决方案。我们展示了如何计算两个对偶四元数与24个实数乘法和64个实数加法的乘积。在讨论算法的合成过程中,我们使用了两个对偶四元数的乘积可以表示为矩阵向量乘积的事实。参与乘积计算的矩阵被乘数具有独特的结构特性,可以执行其有利的分解。即,这种因式分解导致对偶四元数乘法的乘法复杂性的显着降低。我们表明,通过这种方法,可以构造计算双四元数乘积的计算过程,从而与直接实现矩阵向量乘法相比,最终仅需要乘数的一半。

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