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首页> 外文期刊>Russian electrical engineering >Ways to Set up a Concurrent Error Detection System for Logical Circuits without Memory
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Ways to Set up a Concurrent Error Detection System for Logical Circuits without Memory

机译：没有存储器的逻辑电路并发错误检测系统的建立方法

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Classical and modulo codes with summation of active bits of data vectors are often used to set up a concurrent error detection system for logical circuits without memory. Due to specificity in code generation, the number of ways for organizing the concurrent error detection system is equal to the number of inputs of the tested object. The task of expending the set of codes with summation has appeared. Methods of digital device theory, coding theory, and technical diagnostic theory are used for solving this problem. The generalized algorithm for generating the generic class of modulo modified code with summing of the active bits of data vectors is presented and the set's cardinality is determined for the given number of outputs of the tested object. The essence of the presented class of codes lies in the determination of the smallest nonnegative deductions of a data vector's weight and correction of the obtained modified weights. Modulo modified codes with summing of the active bits of data vectors are characterized by different properties of error detection in functional diagnostic systems. This makes it possible to generate dependable digital devices with reduced hardware redundancy and power consumption.
机译：带有数据矢量有效位之和的经典码和模码通常用于为没有存储器的逻辑电路建立并发错误检测系统。由于代码生成的特殊性，组织并发错误检测系统的方式数量等于被测试对象的输入数量。已经出现了用求和来扩展代码集的任务。解决这一问题的方法有数字设备理论，编码理论和技术诊断理论。提出了一种通用算法，该算法通过对数据矢量的有效位进行求和来生成通用模修改代码类，并针对给定数量的被测对象的输出确定集合的基数。所提出的代码类别的实质在于确定数据矢量权重的最小非负推论，并对获得的修改后的权重进行校正。在功能诊断系统中，通过对数据矢量的有效位求和的模修改码具有不同的检错特性。这使得可以生成具有减少的硬件冗余和功耗的可靠的数字设备。

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