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首页> 外文期刊>Science, Measurement & Technology, IET >Low power 2D finite impulse response filter design using modified artificial bee colony algorithm with experimental validation using field-programmable gate array
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Low power 2D finite impulse response filter design using modified artificial bee colony algorithm with experimental validation using field-programmable gate array

机译：使用改进的人工蜂群算法的低功率2D有限冲激响应滤波器设计以及使用现场可编程门阵列的实验验证

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摘要

Motivated by the need of reducing power consumption (PC) in two dimensional (2D) finite impulse response (FIR) filters, in this work, the 2D FIR filter design task is formulated as an optimisation problem that seeks to attain the desired frequency response and reduces PC. The optimisation problem has been solved using the modified version of artificial bee colony algorithm. The applicability of the proposed approach has been evaluated by designing circular shaped 2D FIR filters for a set of specifications in frequency domain. The designed filters have been compared with other reported state of the art techniques. The evaluation is carried out in terms of pass band and stop band ripple minimisation, convergence profile and PC during filter execution in hardware. The proposed technique is found to outperform all other techniques in achieving minimum ripple for a given filter order. To prove the effectiveness of the proposed approach for PC reduction, the designed filters have been implemented in hardware using field-programmable gate array (xc7vx485t-2ffg1761). The PC computed using Xilinx X-power analyser shows that 23.53% power can be saved using the proposed approach as compared with conventional design approaches.
机译：出于减少二维（2D）有限脉冲响应（FIR）滤波器功耗（PC）的需要，在这项工作中，将2D FIR滤波器设计任务表述为一个优化问题，旨在获得所需的频率响应和减少PC。优化问题已使用人工蜂群算法的改进版本解决。通过为频域中的一组规范设计圆形2D FIR滤波器，已经评估了所提出方法的适用性。已将设计的滤波器与其他已报道的现有技术进行了比较。根据通带和阻带纹波最小化，收敛曲线和硬件执行滤波器期间的PC进行评估。对于给定的滤波器阶数，发现拟议的技术在实现最小纹波方面优于所有其他技术。为了证明所提出的减少PC的方法的有效性，已设计的滤波器已使用现场可编程门阵列（xc7vx485t-2ffg1761）在硬件中实现。使用Xilinx X功率分析仪计算的PC显示，与传统的设计方法相比，使用本方法可以节省23.53％的功率。

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