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首页> 外文期刊>IEEE Journal of Solid-State Circuits >A 12-b 5-Msample/s two-step CMOS A/D converter
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A 12-b 5-Msample/s two-step CMOS A/D converter

机译：一个12-b 5-Msample / s两步CMOS A / D转换器

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摘要

Two-step flash architectures are an effective means of realizing high-speed high-resolution analog-to-digital converters (ADCs) because they can be implemented without the need for operational amplifiers having either high gain or a large output swing. Moreover, with conversion rates approaching half those of fully parallel designs, such half-flash architectures provide both a relatively small input capacitance and low power dissipation. The authors describe the design of a 12-b 5-Msample/s A/D converter that is based on a two-step flash topology and has been integrated in a 1- mu m CMOS technology. Configured as a fully differential circuit, the converter performs a 7-b coarse flash conversion followed by a 6-b fine flash conversion. Both analog and digital error correction are used to achieve a resolution of 12 b. The converter dissipates only 200 mW from a single 5-V supply and occupies an area of 2.5 mm * 3.7 mm.
机译：两步闪存架构是实现高速高分辨率模数转换器（ADC）的有效手段，因为它们可以实现而无需具有高增益或大输出摆幅的运算放大器。而且，由于转换率接近完全并行设计的转换率的一半，因此这种半闪存架构既提供了相对较小的输入电容，又提供了低功耗。作者介绍了基于两步闪存拓扑结构并已集成到1-μmCMOS技术中的12-b 5-Msample / s A / D转换器的设计。配置为全差分电路，该转换器执行7b的粗略Flash转换，然后执行6b的细微Flash转换。模拟和数字纠错均用于实现12 b的分辨率。该转换器从5V单电源消耗的功率仅为200mW，占用面积为2.5mm * 3.7mm。

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