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首页> 外文期刊>IEEE Journal of Solid-State Circuits >An analog neural network processor with programmable topology
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An analog neural network processor with programmable topology

机译：具有可编程拓扑的模拟神经网络处理器

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摘要

The architecture, implementation, and applications of a special-purpose neural network processor are described. The chip performs over 2000 multiplications and additions simultaneously. Its data path is particularly suitable for the convolutional topologies that are typical in classification networks, but can also be configured for fully connected or feedback topologies. Resources can be multiplexed to permit implementation of networks with several hundreds of thousands of connections on a single chip. Computations are performed with 6 b accuracy for the weights and 3 b for the neuron states. Analog processing is used internally for reduced power dissipation and higher density, but all input/output is digital to simplify system integration. The practicality of the chip is demonstrated with an implementation of a neural network for optical character recognition. This network contains over 130000 connections and was evaluated in 1 ms.
机译：描述了专用神经网络处理器的体系结构，实现和应用。该芯片可同时执行2000多次乘法和加法运算。它的数据路径特别适用于分类网络中典型的卷积拓扑，但也可以配置为完全连接或反馈拓扑。可以对资源进行多路复用，以允许在单个芯片上实现具有数十万个连接的网络。权重的计算精度为6 b，神经元状态的计算精度为3 b。内部使用模拟处理以降低功耗并提高密度，但是所有输入/输出均为数字，以简化系统集成。芯片的实用性通过神经网络的光学字符识别实现。该网络包含超过130000个连接，并在1毫秒内进行了评估。

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