The authors describe the design of a baseband codec for European and North American digital cellular telephone applications. By integrating all the data conversion circuitry, this chip offers a low-cost, low-power solution to baseband signal processing and control functions. The receive section has two paths to process the in-phase and quadrature-phase components of the signal. Each path consists of a programmable gain amplifier (PGA) and a 10-b sigma-delta analog/digital (A/D) converter. Two 8-b digital/analog (D/A) converters generate the in-phase and quadrature-phase components of the transmit signal. A 9-b digital-analog converter (DAC) and a 10-b DAC are provided to perform auxiliary control functions. The chip is fabricated using a 0.9- mu m CMOS technology and has an area of 21 mm/sup 2/. The average power dissipation is 85 mW.
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