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D-Band Frequency Quadruplers in BiCMOS Technology

机译：BiCMOS技术中的D波段四倍频器

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This paper presents two D-band frequency quadruplers (FQs) employing different circuit techniques. First FQ is a 129–171-GHz stacked Gilbert-cell multiplier using a bootstrapping technique, which improves the bandwidth and the conversion gain with respect to the conventional topology. Stacked architecture enables current reuse for the second frequency doubler resulting in a compact and energy-efficient design. The circuit reaches 3-dB bandwidth of 42 GHz, which is the highest among similar reported quadruplers. It achieves 2.2-dBm saturated output power, 5-dB peak conversion gain, and 1.7% peak DC-to-RF efficiency. The stacked FQ occupies 0.08 mmn2nand consumes 22.7 mA from 4.4-V supply. Second presented circuit is a transformer-based injection-locked FQ (T-ILFQ) employing an E-band push–push voltage-controlled oscillator (PP-VCO). The VCO is a self-buffered common-collector Colpitts oscillator with a transformer formed on emitter inductors. Proposed configuration does not reduce the tuning range of the VCO, thus providing wide locking range and high sensitivity with respect to the injected signal. The T-ILFQ achieves 21.1% locking range, which is the highest among other reported injection-locked frequency multipliers. The peak output power is −4 dBm and the input sensitivity reaches −22 dBm. The circuit occupies 0.09 mmn2nand consumes 14.8 mA from 3.3-V supply.
机译：本文介绍了采用不同电路技术的两个D频段四倍频器（FQ）。第一个FQ是采用自举技术的129-171 GHz堆叠式吉尔伯特单元乘法器，相对于传统拓扑结构，它可以提高带宽和转换增益。堆叠式架构使第二倍频器能够实现电流复用，从而实现了紧凑且节能的设计。该电路达到42 GHz的3 dB带宽，这在报道的类似四倍频器中是最高的。它达到2.2dBm的饱和输出功率，5dB的峰值转换增益和1.7％的DC-RF峰值效率。堆叠的FQ占用0.08 mmn 2 nand从4.4 V电源消耗22.7 mA电流。第二个展示的电路是基于变压器的注入锁定FQ（T-ILFQ），它采用E波段推-推压控振荡器（PP-VCO）。 VCO是一个自缓冲共集电极Colpitts振荡器，在发射极电感器上形成一个变压器。所提出的配置不会减小VCO的调谐范围，因此相对于注入信号提供了宽锁定范围和高灵敏度。 T-ILFQ达到21.1％的锁定范围，在其他报告的注入锁定频率倍增器中是最高的。峰值输出功率为−4 dBm，输入灵敏度达到−22 dBm。电路占用0.09 mmn 2 < / sup> nand从3.3V电源消耗14.8mA电流。

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