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首页> 外文期刊>Solid-State Circuits, IEEE Journal of >A 0.022 mm src='/images/tex/21505.gif' alt='^{{2}}'> 98.5 dB SNDR Hybrid Audio src='/images/tex/1026.gif' alt='Delta Sigma '> Modulator With Digital ELD Compensation in 28 nm CMOS
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A 0.022 mm src='/images/tex/21505.gif' alt='^{{2}}'> 98.5 dB SNDR Hybrid Audio src='/images/tex/1026.gif' alt='Delta Sigma '> Modulator With Digital ELD Compensation in 28 nm CMOS

机译：0.022毫米<公式Formulatype =“ inline”> src =“ / images / tex / 21505.gif” alt =“ ^ {{{2}}”> 98.5 dB SNDR混合音频<公式Formula =“ inline“> src =” / images / tex / 1026.gif“ alt =” Delta Sigma“> 在28 nm CMOS中具有数字ELD补偿的调制器

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摘要

This work presents a compact-area hybrid continuous-time delta-sigma modulator (CTDSM) with a shared 6 bit asynchronous successive approximation register (ASAR) quantizer for audio application. It is implemented in a 28 nm CMOS process. The modulator incorporates an analog integrator and a digital filter. Signal is digitized after the analog first stage and processed digitally thereafter. Only the first stage is left in the analog domain. Because of high integration of digital circuitry, it could benefit from process advancement such as low power consumption and small area. Moreover, the excess loop delay (ELD) is compensated in the digital domain, and the conventional analog local feedback DAC for ELD compensation is no longer needed. In addition, resistive DAC (R-DAC) is adopted for low flicker noise. The measured DR and SNDR in 24 kHz BW are 100.6 dB and 98.5 dB, respectively, while occupying 0.022 mm 2 and achieving FOMs (SNDR + 10 log(BW/Power)) of 171.8 dB.
机译：这项工作提出了一种紧凑区域混合连续时间Δ-Σ调制器（CTDSM），具有用于音频应用的共享6位异步逐次逼近寄存器（ASAR）量化器。它以28 nm CMOS工艺实现。该调制器包含一个模拟积分器和一个数字滤波器。信号在模拟的第一阶段之后被数字化，然后被数字化处理。仅第一级留在模拟域中。由于数字电路的高度集成，它可以受益于工艺进步，例如低功耗和小面积。此外，多余的环路延迟（ELD）在数字域中得到补偿，不再需要用于ELD补偿的常规模拟本地反馈DAC。此外，采用电阻性DAC（R-DAC）以降低闪烁噪声。在24 kHz带宽中测得的DR和SNDR分别为100.6 dB和98.5 dB，同时占用0.022 mm 2并达到171.8 dB的FOM（SNDR + 10 log（BW / Power））。

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