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A 1770- μ m2 Leakage-Based Digital Temperature Sensor With Supply Sensitivity Suppression in 55-nm CMOS

机译:基于1770-μM2的基于泄漏的数字温度传感器,在55-NM CMOS中提供敏感性抑制

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This article presents a leakage-based digital temperature sensor with reduced supply sensitivity for on-chip thermal management. The sensor, featured with a novel supply sensitivity suppression mechanism, performs the temperature-to-frequency conversion by a leakage-dominated ring oscillator (LDRO) with exponential temperature dependence. Thanks to the proposed robust and reconfigurable Schmitt-trigger-based delay cell, both NMOS and PMOS leakage-based sensors can be evaluated in a single design. Fabricated in a standard 55-nm CMOS digital process, the proposed digital temperature sensor occupies a silicon area of only 1770 $mu ext{m}<^>{2}$ and can operate under a supply ranging from 0.8 to 1.3 V, with the supply sensitivities of 2.53-5.22 degrees C/V and 2.84-5.76 degrees C/V in two working modes at room temperature, respectively. Measurement results show that the sensor achieves an inaccuracy of +/- 0.70 degrees C (3 $sigma $ ) from -40 degrees C to 125 degrees C after two-point calibration.
机译:本文介绍了一种基于泄漏的数字温度传感器,对片上热管理的供应灵敏度降低。具有新颖供应灵敏度抑制机构的传感器,通过漏电主导的环形振荡器(LDRO)进行漏极频率转换,具有指数温度依赖性。由于所提出的鲁棒和可重新配置的施密特触发器的延迟单元,可以在单个设计中评估NMOS和PMOS泄漏的传感器。在标准的55-NM CMOS数字过程中制造,所提出的数字温度传感器占用仅1770美元 Mu Text {M} <^> {2} $的硅面积,并且可以在0.8至1.3 V的电源下运行。 ,供应敏感性为2.53-5.22℃/ v和2.84-5.76摄氏度的2.84-5.76摄氏度分别在室温下两种工作模式。测量结果表明,在两点校准后,传感器从-40摄氏度到125摄氏度达到+/- 0.70度C(3 $ sigma $)的不准确性。

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