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首页> 外文期刊>IEEE Journal of Solid-State Circuits >High-Value Tunable Pseudo-Resistors Design
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High-Value Tunable Pseudo-Resistors Design

机译：高价值可调伪电阻器设计

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Pseudo-resistor circuits are used to mimic large value resistors and base their success on the reduction of occupied areas with respect to physical devices of equal value. This article presents an optimized architecture of pseudo-resistor, made in standard CMOS 0.35 mu m technology to bias a low-noise transimpedance amplifier for high-sensitivity applications in the frequency range 100 kHz-10 MHz. The architecture was selected after a critical review of the different topologies to implement high-value resistances with MOSFET transistors, considering their performance in terms of linearity of response, symmetric dynamic range, frequency behavior, and simplicity of realization. The resulting circuit consumes an area of 0.017 mm(2) and features a tunable resistance from 20 M Omega to 20 G Omega, dynamic offset reduction due to a more than linear I-V curve, and a high-frequency noise well below the one of a physical resistor of equal value. This latter aspect highlights the larger perspective of pseudo-resistors as building blocks in very low-noise applications in addition to the advantage in occupied areas they provide.
机译：伪电阻电路用于模拟大值电阻器，并基于相对于等值的物理设备的占用区域的减少的成功。本文介绍了伪电阻的优化架构，由标准CMOS 0.35 MU M技术制成，用于偏置低噪声减阻放大器，用于频率范围100 kHz-10MHz的高灵敏度应用。在与MOSFET晶体管的不同拓扑对不同拓扑的关键综述后，选择了架构，以便在响应的线性度，对称动态范围，频率行为和实现简单方面进行性能。得到的电路消耗面积为0.017mm（2），并具有从20m omega到20 gω的可调谐电阻，由于大于线性的IV曲线，并且高频噪声低于a以下的高频噪声相同值的物理电阻。除了它们提供的占用区域的优势之外，后一种方面突出了伪电阻作为非常低噪声应用中的构建块的较大透视图。

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