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首页> 外文期刊>IEEE Journal of Solid-State Circuits >A Capacitor-Coupled Offset-Canceled Sense Amplifier for DRAMs With Reduced Variation of Decision Threshold Voltage
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A Capacitor-Coupled Offset-Canceled Sense Amplifier for DRAMs With Reduced Variation of Decision Threshold Voltage

机译：用于Drame判定阈值电压变化的DRAM的电容器耦合的偏移读出放大器

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This article reports an offset-canceled DRAM sense amplifier with coupling capacitors to store and cancel the offset arising from random variations of the threshold voltages of the amplifying transistors. Analytical calculations of the average and standard deviation of the decision threshold voltages, defined as the voltage in the cell capacitor that bifurcates into binary levels when activated, are performed on various DRAM sensing schemes and their comparison results are presented. Based on the analysis, the proposed sense amplifier scheme using coupling capacitors is shown to offer the least amount of variation in the decision threshold, thereby increasing the sensing margin of the overall DRAM design. The coupling capacitors not only compensate for the random offset of the sense amplifiers but also mitigate the effect of the mismatch of the bitline capacitances in the open bitline scheme. Measurement on the experimental chip fabricated in a 65-nm CMOS process validates the analysis and confirms the superior performance of the proposed DRAM sensing scheme.
机译：本文报告了一个偏移取消的DRAM检测放大器，具有耦合电容器来存储和取消来自放大晶体管的阈值电压的随机变化产生的偏移。分析计算判定阈值电压的平均值和标准偏差，定义为在激活时分叉进入二进制电平的电池电容器中的电压，在各种DRAM传感方案上执行，并呈现它们的比较结果。基于分析，示出了使用耦合电容器的所提出的读出放大器方案来提供判定阈值的最小变化量，从而增加了整个DRAM设计的感测余量。耦合电容器不仅补偿了读出放大器的随机偏移，还可以减轻位线电容中的不匹配在打开位线方案中的效果。在65-NM CMOS工艺中制造的实验芯片测量验证了分析并确认了所提出的DRAM传感方案的优越性。

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