A Resonant Global Clock Distribution for the Cell Broadband Engine Processor

Chan S.C.; Restle P.J.; Bucelot T.J.; Liberty J.S.; Weitzel S.; Keaty J.M.; Flachs B.; Volant R.; Kapusta P.; Zimmerman J.S.

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A Resonant Global Clock Distribution for the Cell Broadband Engine Processor

机译：单元宽带引擎处理器的谐振全局时钟分配

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Resonant clock distributions have the potential to save power by recycling energy from cycle-to-cycle while at the same time improving performance by reducing the clock distribution latency and filtering out non-periodic noise. While these features have been successfully demonstrated in several small-scale experiments, there remained a number of concerns about whether these techniques would scale to a product application. By modifying the Cell broadband engine processor to incorporate a large resonant global clock network, power savings with full functionality is demonstrated over a 20% range in clock frequencies, and a 6-8 Watt power savings at 4 GHz. This was achieved by changing one wiring level and adding an additional thick copper level to create inductors and capacitors.

机译：谐振时钟分配具有通过逐周期回收能量来节省功率的潜力，同时可以通过减少时钟分配等待时间并滤除非周期性噪声来提高性能。尽管这些功能已在几个小规模的实验中得到了成功证明，但是对于这些技术是否可以扩展到产品应用仍然存在许多担忧。通过修改Cell宽带引擎处理器以合并大型谐振全球时钟网络，可以在时钟频率的20％范围内实现具有完整功能的节能，并在4 GHz时实现6-8瓦的节能。这是通过更改一个布线级别并添加额外的粗铜级别以创建电感器和电容器来实现的。

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来源
《IEEE Journal of Solid-State Circuits》 |2009年第1期|p.64-72|共9页
作者
Chan S.C.; Restle P.J.; Bucelot T.J.; Liberty J.S.; Weitzel S.; Keaty J.M.; Flachs B.; Volant R.; Kapusta P.; Zimmerman J.S.;
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收录信息美国《科学引文索引》(SCI);美国《工程索引》(EI);
原文格式 PDF
正文语种 eng
中图分类一般性问题;基本电子电路;
关键词
clocks; microprocessor chips; capacitors; cell broadband engine processor; frequency 4 GHz; high-performance multi-core microprocessors; inductors; power 6 W to 8 W; power savings; resonant global clock distribution; Clock distribution; clock grid; clock tree; induct;

机译：时钟;微处理器芯片;电容器;蜂窝宽带引擎处理器;频率4 GHz;高性能多核微处理器;电感器;功率6 W至8 W;节省功率;谐振全局时钟分配;时钟分配;时钟网格;时钟树;诱导;

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1. Uniform-Phase Uniform-Amplitude Resonant-Load Global Clock Distributions [J] . Steven C. Chan, Kenneth L. Shepard, Phillip J. Restle IEEE Journal of Solid-State Circuits . 2005,第1期

机译：均匀相位均匀幅度谐振负载全局时钟分布
2. Design Methodology for Global Resonant H-Tree Clock Distribution Networks [J] . Rosenfeld J., Friedman E.G. IEEE transactions on very large scale integration (VLSI) systems . 2007,第2期

机译：全局谐振H树时钟分配网络的设计方法
3. Design Methodology for Global Resonant ${rm H}$-Tree Clock Distribution Networks [J] . Jonathan Rosenfeld, Eby G. Friedman IEEE transactions on very large scale integration (VLSI) systems . 2007,第期

机译：全局谐振$ {rm H} $-树时钟分配网络的设计方法
4. A Resonant Global Clock Distribution for the Cell Broadband-Engine驴 Processor [C] . Chan S., Restle P., Bucelot T., IEEE International Solid-State Circuits Conference . 2008

机译：用于电池宽带发动机的谐振全局时钟分布驴处理器
5. Design of multi-GHz resonant global clock distributions. [D] . Chan, Steven C. 2005

机译：多GHz谐振全局时钟分布的设计。
6. Ultra-broadband Optical Gain Engineering in Solution-processed QD-SOA Based on Superimposed Quantum Structure [O] . Hamed Goli Yousefabad, Samiye Matloub, Ali Rostami -1

机译：基于叠加量子结构的固溶QD-SOA超宽带光增益工程
7. Video analysis and compression on the STI Cell Broadband Engine processor [O] . Lurng-kuo Liu, Sreeni Kesavarapu, Jonathan Connell, 2016

机译：sTI Cell Broadband Engine处理器上的视频分析和压缩
8. Frequency Stability Analysis of GPS (Global Positioning System) NAVSTARs 3 and 4 Rubidium Clocks and the NAVSTARs 5 and 6 Cesium Clocks [R] . McCaskill, T. B., Buisson, J. A., Stebbins, S. B. 1983

机译：Gps（全球定位系统）NaVsTaRs 3和4铷钟以及NaVsTaR 5和6铯钟的频率稳定性分析

A Resonant Global Clock Distribution for the Cell Broadband Engine Processor

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