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首页> 外文期刊>IEEE Journal of Solid-State Circuits >A Flexible, Ultra-Low-Energy 35 pJ/Pulse Digital Back-End for a QAC IR-UWB Receiver
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A Flexible, Ultra-Low-Energy 35 pJ/Pulse Digital Back-End for a QAC IR-UWB Receiver

机译：用于QAC IR-UWB接收器的灵活的超低功耗35 pJ /脉冲数字后端

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摘要

A low-energy, flexible digital back-end for the Quadrature Analog Correlating (QAC) IR-UWB receiver, implemented in 0.13 $mu$m CMOS technology, is presented. The built-in flexibility allows the receiver to operate over a wide range of frequency bands, pulse rates, code lengths, acquisition modes, etc. This ability to dynamically trade power consumption, system performance and system reliability is crucial for application in sensor networks where energy is scarce. To avoid the large power penalty, that often accompanies the introduction of flexibility, the chip''s architecture is based on nested FLEXmodules. These are small configurable modules with a local controller, that can be slowed down and clock gated individually. Communicating at 40 Mpulses/s, the resulting digital back-end consumes as little as 3.5mW in acquisition mode and 1.5 mW during data reception. This is equivalent to an energy consumption of 35pJ per received pulse.
机译：提出了一种用于低功耗，灵活的数字后端的正交模拟相关（QAC）IR-UWB接收器，它采用0.13μmCMOS技术实现。内置的灵活性允许接收器在很宽的频带，脉冲率，代码长度，采集模式等范围内工作。这种动态权衡功耗，系统性能和系统可靠性的能力对于传感器网络中的应用至关重要。能量稀缺。为了避免通常伴随灵活性引入而带来的大功率损失，该芯片的体系结构基于嵌套的FLEX模块。这些是带有本地控制器的小型可配置模块，可以降低速度并单独进行时钟门控。以40 Mpuls / s的速度进行通信，所得的数字后端在采集模式下的功耗仅为3.5mW，在数据接收过程中的功耗为1.5mW。这相当于每个接收脉冲消耗35pJ的能量。

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