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首页> 外文期刊>IEEE Journal of Solid-State Circuits >A CMOS Ultra-Wideband Receiver for Low Data-Rate Communication
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A CMOS Ultra-Wideband Receiver for Low Data-Rate Communication

机译：用于低数据速率通信的CMOS超宽带接收器

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摘要

A low-power impulse-radio ultra-wideband receiver is demonstrated for low data-rate applications. A topology selection study demonstrates that the quadrature analog correlation is a good receiver architecture choice when energy consumption must be minimized. The receiver operates in the 3.1驴5 GHz band of the UWB FCC spectrum mask on channels of 500 MHz bandwidth. The pulse correlation operation is done in the analog domain in order to reduce the ADC sampling speed down to the pulse repetition rate, thereby reducing the power consumption. The receiver comprises a low-noise amplifier with full on-chip matching network, an RF local oscillator generation, two quadrature mixers, two analog baseband chains followed by two ADCs, and a clock generation network. The receiver is implemented in 0.18 $mu{hbox {m}}$ CMOS technology and achieves 16 mA power consumption at 20 Mpulses/s pulse repetition rate.
机译：演示了一种用于低数据速率应用的低功率脉冲无线电超宽带接收机。拓扑选择研究表明，当必须最小化能量消耗时，正交模拟相关是一个很好的接收器架构选择。接收器在500 MHz带宽的信道上的UWB FCC频谱模板的3.1驴5 GHz频带中运行。脉冲相关操作在模拟域中完成，以便将ADC采样速度降低到脉冲重复率，从而降低功耗。该接收器包括一个具有完整的片上匹配网络的低噪声放大器，一个RF本机振荡器生成器，两个正交混频器，两个模拟基带链和两个ADC，以及一个时钟生成网络。该接收器采用0.18μmCMOS技术实现，并以20 Mpulses / s的脉冲重复速率实现了16 mA的功耗。

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